95 lines
2.8 KiB
C++
95 lines
2.8 KiB
C++
#ifndef __PScope_H
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#define __PScope_H
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/*
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* Copyright (c) 2008 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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# include "StringHeap.h"
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# include "pform_types.h"
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# include <map>
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class PEvent;
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class AProcess;
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class PProcess;
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class PWire;
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class Design;
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class NetScope;
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/*
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* The PScope class is a base representation of an object that
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* represents lexical scope. For example, a module, a function/task, a
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* named block is derived from a PScope.
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*
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* NOTE: This is note the same concept as the "scope" of an elaborated
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* hierarchy. That is represented by NetScope objects after elaboration.
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*/
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class LexicalScope {
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public:
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explicit LexicalScope() { }
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// A virtual destructor is so that dynamic_cast can work.
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virtual ~LexicalScope() { }
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// Nets an variables (wires) in the scope
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map<perm_string,PWire*>wires;
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PWire* wires_find(perm_string name);
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// Behaviors (processes) in this scope
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list<PProcess*> behaviors;
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list<AProcess*> analog_behaviors;
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private:
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};
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class PScope : public LexicalScope {
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public:
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// When created, a scope has a name and a parent. The name is
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// the name of the definition. For example, if this is a
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// module declaration, the name is the name after the "module"
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// keyword, and if this is a task scope, the name is the task
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// name. The parent is the lexical parent of this scope. Since
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// modules do not nest in Verilog, the parent must be nil for
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// modules. Scopes for tasks and functions point to their
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// containing module.
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PScope(perm_string name, PScope*parent);
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PScope(perm_string name);
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virtual ~PScope();
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perm_string pscope_name() const { return name_; }
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PScope* pscope_parent() { return parent_; }
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// Named events in the scope.
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map<perm_string,PEvent*>events;
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protected:
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void dump_wires_(ostream&out, unsigned indent) const;
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bool elaborate_sig_wires_(Design*des, NetScope*scope) const;
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bool elaborate_behaviors_(Design*des, NetScope*scope) const;
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private:
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perm_string name_;
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PScope*parent_;
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};
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#endif
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