mirror of
https://github.com/steveicarus/iverilog.git
synced 2026-08-29 01:03:29 +02:00
Lars-Peter Clausen
571f222a73
Check that it is possible to both declare and call class constructors without using parenthesis after the `new` keyword. Check that a non-ANSI port for a class constructor results in an error. Check that it is possible to invoke a class task through a implicit class handle (`this` or `super`) without using parenthesis after the task name. Signed-off-by: Lars-Peter Clausen <[email protected]>
23 lines
321 B
Verilog
23 lines
321 B
Verilog
// Check that it is possible to call a class task without parenthesis after the
|
|
// task name when using the implicit `this` class handle.
|
|
|
|
module test;
|
|
|
|
class C;
|
|
task a;
|
|
$display("PASSED");
|
|
endtask
|
|
|
|
task b;
|
|
this.a;
|
|
endtask
|
|
endclass
|
|
|
|
C c = new;
|
|
|
|
initial begin
|
|
c.b;
|
|
end
|
|
|
|
endmodule
|