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By adding ivtest to the iverilog source tree, it is easier to keep the regression test synchronized with the source that is being tested. This should be especially helpful for PRs that add a new feature, and have a matching ivtest PR with the regression test for that feature.
24 lines
328 B
Verilog
24 lines
328 B
Verilog
module test4;
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reg r;
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endmodule
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module test3;
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test4 test4();
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endmodule
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module test2;
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initial begin
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$dumpvars(1, test3.test4);
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end
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test3 test3();
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endmodule
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module test;
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initial begin
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$dumpfile("work/dumpfile.vcd");
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$dumpvars(1, test2.test3);
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$display("PASSED");
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end
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test2 test2();
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endmodule
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