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Stephen Williams
cea237b407
By adding ivtest to the iverilog source tree, it is easier to keep the regression test synchronized with the source that is being tested. This should be especially helpful for PRs that add a new feature, and have a matching ivtest PR with the regression test for that feature.
21 lines
213 B
Verilog
21 lines
213 B
Verilog
module pr2842185();
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// check that dection of signal/genvar name collisions
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// observes scope boundaries.
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genvar i;
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task MyTask;
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integer i;
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begin
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$display("PASSED");
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end
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endtask
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initial MyTask;
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endmodule
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