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By adding ivtest to the iverilog source tree, it is easier to keep the regression test synchronized with the source that is being tested. This should be especially helpful for PRs that add a new feature, and have a matching ivtest PR with the regression test for that feature.
8 lines
149 B
Verilog
8 lines
149 B
Verilog
module top;
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parameter rep = 4'bx;
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wire [31:0] b = {rep{8'hab}}; // This should be a compilation error.
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initial $display("FAILED");
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endmodule
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