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By adding ivtest to the iverilog source tree, it is easier to keep the regression test synchronized with the source that is being tested. This should be especially helpful for PRs that add a new feature, and have a matching ivtest PR with the regression test for that feature.
21 lines
297 B
Verilog
21 lines
297 B
Verilog
// Use the default timescale.
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module top;
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initial begin
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$printtimescale(top);
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$printtimescale(other);
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$printtimescale(other2);
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end
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endmodule
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`timescale 1ms/1ms
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// Use the given timescale.
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module other;
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endmodule
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`resetall
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// Use the default timescale.
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module other2;
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endmodule
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