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https://github.com/steveicarus/iverilog.git
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Stephen Williams
cea237b407
By adding ivtest to the iverilog source tree, it is easier to keep the regression test synchronized with the source that is being tested. This should be especially helpful for PRs that add a new feature, and have a matching ivtest PR with the regression test for that feature.
70 lines
1.5 KiB
Verilog
70 lines
1.5 KiB
Verilog
// Copyright 2007, Martin Whitaker
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// This file may be freely copied for any purpose.
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module macro_with_args();
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`define forward_and_reverse(str1,str2,str3) /* comment */ \
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$write("%0s", str1); /* comment */ \
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$write(".."); /* comment */ \
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$write("%0s", str3); /* comment */ \
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$write("%0s", str2); /* comment */ \
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$write("%0s", str3); /* comment */ \
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$write(".."); /* comment */ \
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$write("%0s", str1); /* comment */ \
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$write("\n")
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`define sqr( x ) (x * x) // comment
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`define sum( a /* comment */ , b /* comment */ ) /* comment */ \
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(a + b)
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`define sumsqr(
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a // comment
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,
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b // comment
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) \
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`sum ( \
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`sqr(a) \
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, \
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`sqr(b) \
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)
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`define no_args (a,b,c)
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`define null1 // null
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`define null2
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integer value;
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reg [79:0] astr, bstr, cstr;
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initial begin
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`forward_and_reverse("first"," first,last ","last");
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$sformat(astr, "(a%s)", ``null1);
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$sformat(bstr, " %s ", ``no_args);
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$sformat(cstr, "(c%s)", ``null2);
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`forward_and_reverse // comment
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( // comment
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astr // comment
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, // comment
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bstr // comment
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, // comment
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cstr // comment
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); // comment
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value = `sumsqr(3,4);
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$display("sumsqr(3,4) = %1d", value);
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if (value != `sqr(5)) $display("sumsqr expansion failed");
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value = `sumsqr
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(
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(2 + 3) /* 5 */
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,
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(4 + 8) /* 12 */
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);
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$display("sumsqr(5,12) = %1d", value);
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if (value != `sqr(13)) $display("sumsqr expansion failed");
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end
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endmodule
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