mirror of
https://github.com/steveicarus/iverilog.git
synced 2026-08-29 01:03:29 +02:00
Lars-Peter Clausen
315bc1908a
Check that the behavior for all sorts of base types for enums is correctly implemented. Both for valid as well as invalid base types. Signed-off-by: Lars-Peter Clausen <[email protected]>
15 lines
236 B
Verilog
15 lines
236 B
Verilog
// Check that specifying a vector type with multiple packed dimensions as the
|
|
// base type for an enum results in an error.
|
|
|
|
module test;
|
|
|
|
enum logic [1:0][1:0] {
|
|
A
|
|
} e;
|
|
|
|
initial begin
|
|
$display("FAILED");
|
|
end
|
|
|
|
endmodule
|