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mirror of https://github.com/steveicarus/iverilog.git synced 2026-08-28 16:53:45 +02:00
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442750ca2c1d2cee567b760fb0bc37f716787996
iverilog/tgt-blif
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Christian Taedcke 6d5aabd4f0 Make a few constructors explicit.
This removes cppcheck warnings.
2015-10-22 12:33:33 +02:00
..
blif-s.conf
…
blif.cc
Remove fixable unused-parameter warnings
2014-01-30 15:34:08 -08:00
blif.conf
Always turn on ivl synthesis for blif target.
2013-08-25 12:27:55 -07:00
constants.cc
…
cppcheck.sup
Remove some cppcheck warnings
2014-06-28 16:56:09 -07:00
logic_gate.cc
…
lpm_add.cc
…
lpm_cmp_eq.cc
…
lpm_cmp_gt.cc
Just a few more spelling fixes
2015-06-17 08:09:34 -07:00
lpm_ff.cc
Fix space/tab problem.
2013-09-23 10:32:54 -07:00
lpm_mux.cc
Force calculation of blif_nex_data_t width for lib_mux_s1 devices.
2013-08-25 12:27:56 -07:00
lpm_part_vp.cc
blif target supports wide LPM_PART_VP devices.
2013-08-31 16:43:37 -07:00
lpm_re_logic.cc
…
lpm.cc
blif support for IVL_LPM_FF devices.
2013-08-25 12:27:56 -07:00
Makefile.in
Remove some cppcheck warnings
2014-06-28 16:56:09 -07:00
nex_data.cc
blif target supports wide LPM_PART_VP devices.
2013-08-31 16:43:37 -07:00
nex_data.h
Make a few constructors explicit.
2015-10-22 12:33:33 +02:00
priv.h
Update header files to use a more standard name to prevent rereading
2014-07-23 13:42:56 -07:00
README-BLIF.txt
Call IEEE 1800 SystemVerilog
2014-09-08 20:49:40 -07:00
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