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<li class="toctree-l1"><a class="reference internal" href="../releases/index.html">Icarus Verilog Release Notes</a><ul>
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<li class="toctree-l2"><a class="reference internal" href="command_line_flags.html">iverilog Command Line Flags</a></li>
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<li class="toctree-l2"><a class="reference internal" href="ivlpp_flags.html">IVLPP - IVL Preprocessor</a></li>
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<li class="toctree-l2"><a class="reference internal" href="vvp_flags.html">VVP Command Line Flags</a></li>
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<li class="toctree-l2"><a class="reference internal" href="vvp_debug.html">VVP Interactive Mode</a></li>
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<li class="toctree-l2"><a class="reference internal" href="vvp_library.html">VVP as a library</a></li>
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<li class="toctree-l2"><a class="reference internal" href="vhdlpp_flags.html">vhdlpp Command Line Flags</a></li>
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<li class="toctree-l2"><a class="reference internal" href="waveform_viewer.html">Viewing Waveforms</a></li>
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<li class="toctree-l2"><a class="reference internal" href="vpi.html">Using VPI</a></li>
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<li class="toctree-l2"><a class="reference internal" href="icarus_verilog_extensions.html">Icarus Verilog Extensions</a></li>
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<li class="toctree-l2"><a class="reference internal" href="icarus_verilog_quirks.html">Icarus Verilog Quirks</a></li>
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<li class="toctree-l2"><a class="reference internal" href="reporting_issues.html">Reporting Issues</a></li>
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<li class="toctree-l1"><a class="reference internal" href="../targets/index.html">The Icarus Verilog Targets</a><ul>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-vvp.html">The vvp Code Generator (-tvvp)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-stub.html">The stub Code Generator (-tstub)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-null.html">The null Code Generator (-tnull)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-vhdl.html">The VHDL Code Generator (-tvhdl)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-vlog95.html">The Verilog ‘95 Code Generator (-tvlog95)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-pcb.html">The PCB Code Generator (-tpcb)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-fpga.html">The FPGA Code Generator (-tfpga)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-pal.html">The PAL Code Generator (-tpal)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-sizer.html">The sizer Code Analyzer (-tsizer)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-verilog.html">The Verilog Code Generator (-tverilog)</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../targets/tgt-blif.html">The BLIF Code Generator (-tblif)</a></li>
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<li class="toctree-l1"><a class="reference internal" href="../developer/index.html">Icarus Verilog Developer Support</a><ul>
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<li class="toctree-l2"><a class="reference internal" href="../developer/getting_started.html">Getting Started as a Contributor</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../developer/regression_tests.html">The Regression Test Suite</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/ivl/netlist.html">Netlist Format</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../developer/guide/vvp/index.html">VVP - Verilog Virtual Processor</a><ul>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/vvp/vthread.html">Thread Details</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/vvp/debug.html">Debug Aids For VVP</a></li>
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</ul>
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<li class="toctree-l3"><a class="reference internal" href="../developer/guide/tgt-vvp/tgt-vvp.html">The VVP Target</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../developer/guide/vpi/index.html">VPI in Icarus Verilog</a><ul>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/misc/swift.html">Swift Model Support (Preliminary)</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../developer/guide/misc/xilinx-hint.html">Xilinx Hint</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../developer/glossary.html">Glossary</a></li>
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<section id="command-file-format">
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<h1>Command File Format<a class="headerlink" href="#command-file-format" title="Link to this heading">¶</a></h1>
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<p>The basic format of a command file is one source file or compiler argument per
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line. Command files may also have comments of various form, and options for
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controlling the compiler.</p>
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<section id="comments">
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<h2>Comments<a class="headerlink" href="#comments" title="Link to this heading">¶</a></h2>
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<p>Lines that start with a “#” character are comments. All text after the “#”
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character, is ignored.</p>
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<p>The “//” character sequence also starts a comment that continues to the end of
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the line.</p>
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<p>The “/*” and “*/” character sequences surround multi-line comments. All the
|
||
text between the comment start and comment end sequences is ignored, even when
|
||
that text spans multiple lines. This style of comment does not nest, so a “/*”
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||
sequence within a multi-line comment is probably an error.</p>
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</section>
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||
<section id="plus-args">
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||
<h2>Plus-args<a class="headerlink" href="#plus-args" title="Link to this heading">¶</a></h2>
|
||
<p>Outside of comments, lines that start with a “+” character are compiler
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||
arguments. These are called plusargs but they are not the same as extended
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||
arguments passed to the “vvp” command. The supported plusargs are definitively
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||
listed in the iverilog manual page.</p>
|
||
<p>The plusargs lines are generally “+<name>+…” where the name is the name of
|
||
an switch, and the arguments are separated by “+” characters, as in:</p>
|
||
<div class="highlight-none notranslate"><div class="highlight"><pre><span></span><span data-line="1">+libext+.v+.V+.ver
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||
</span></pre></div>
|
||
</div>
|
||
<p>With plusargs lines, the “+” character separates tokens, and not white space,
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||
so arguments, which may include file paths, may include spaces. A plusarg line
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||
is terminated by the line end.</p>
|
||
<p>The line in the command file may also be a “-y” argument. This works exactly
|
||
the same as the:</p>
|
||
<div class="highlight-none notranslate"><div class="highlight"><pre><span></span><span data-line="1">-y <path>
|
||
</span></pre></div>
|
||
</div>
|
||
<p>argument to the compiler; it declares a library directory. The “-y” syntax is
|
||
also a shorthand for the “+libdir” plusarg, which is a more general form:</p>
|
||
<div class="highlight-none notranslate"><div class="highlight"><pre><span></span><span data-line="1">+libdir+<path>...
|
||
</span></pre></div>
|
||
</div>
|
||
</section>
|
||
<section id="file-names">
|
||
<h2>File Names<a class="headerlink" href="#file-names" title="Link to this heading">¶</a></h2>
|
||
<p>Any lines that are not comments, compiler arguments or plusargs are taken by
|
||
the compiler to be a source file. The path can contain any characters (other
|
||
then comment sequences) including blanks, although leading and trailing white
|
||
space characters are stripped. The restriction of one file name per line is in
|
||
support of operating systems that can name files any which way. It is not
|
||
appropriate to expect white spaces to separate file names.</p>
|
||
</section>
|
||
<section id="variable-substitution">
|
||
<h2>Variable Substitution<a class="headerlink" href="#variable-substitution" title="Link to this heading">¶</a></h2>
|
||
<p>The syntax “$(name)” is a variable reference, and may be used anywhere within
|
||
filenames or directory names. The contents of the variable are read from the
|
||
environment and substituted in place of the variable reference. In Windows,
|
||
these environment variables are the very same variables that are set through
|
||
the Control Panel->System dialog box, and in UNIX these variables are
|
||
environment variables as exported by your shell.</p>
|
||
<p>Variables are useful for giving command files some installation
|
||
independence. For example, one can import a vendor library with the line:</p>
|
||
<div class="highlight-none notranslate"><div class="highlight"><pre><span></span><span data-line="1">-y $(VENDOR)/verilog/library
|
||
</span></pre></div>
|
||
</div>
|
||
<p>in the command file, and the next programmer will be able to use this command
|
||
file without editing it to point to the location of VENDOR on his
|
||
machine. Note the use of forward slashes as a directory separator. This works
|
||
even under Windows, so always use forward slashes in file paths and Windows
|
||
and UNIX users will be able to share command files.</p>
|
||
</section>
|
||
<section id="an-example">
|
||
<h2>An Example<a class="headerlink" href="#an-example" title="Link to this heading">¶</a></h2>
|
||
<p>This sample:</p>
|
||
<div class="highlight-none notranslate"><div class="highlight"><pre><span></span><span data-line="1"># This is a comment in a command file.
|
||
</span><span data-line="2"># The -y statement declares a library
|
||
</span><span data-line="3"># search directory
|
||
</span><span data-line="4">-y $(PROJ_LIBRARY)/prims
|
||
</span><span data-line="5">#
|
||
</span><span data-line="6"># This plusarg tells the compiler that
|
||
</span><span data-line="7"># files in libraries may have .v or .vl
|
||
</span><span data-line="8"># extensions.
|
||
</span><span data-line="9">+libext+.v+.vl
|
||
</span><span data-line="10">#
|
||
</span><span data-line="11">main.v // This is a source file
|
||
</span><span data-line="12">#
|
||
</span><span data-line="13"># This is a file name with blanks.
|
||
</span><span data-line="14">C:/Project Directory/file name.vl
|
||
</span></pre></div>
|
||
</div>
|
||
<p>is a command file that demonstrates the major syntactic elements of command
|
||
files. It demonstrates the use of comments, variables, plusargs and file
|
||
names. It contains a lot of information about the hypothetical project, and
|
||
suggests that command files can be used to describe the project as a whole
|
||
fairly concisely.</p>
|
||
<p>The syntax of command files is rich enough that they can be used to document
|
||
and control the assembly and compilation of large Verilog programs. It is not
|
||
unusual to have command files that are hundreds of lines long, although
|
||
judicious use of libraries can lead to very short command files even for large
|
||
designs. It is also practical to have different command files that pull
|
||
together combinations of sources and compiler arguments to make different
|
||
designs from the same Verilog source files.</p>
|
||
</section>
|
||
<section id="summary">
|
||
<h2>Summary<a class="headerlink" href="#summary" title="Link to this heading">¶</a></h2>
|
||
<p>Given the above description of the command file format, the following is a
|
||
list of the special records with their meaning.</p>
|
||
<ul>
|
||
<li><p>+libdir+*dir-path*</p>
|
||
<p>Specify directories to be searched for library modules. The <em>dir-path</em> can
|
||
have multiple directories, separated by “+” characters.</p>
|
||
</li>
|
||
<li><p>+libdir-nocase+dir-path</p>
|
||
<p>This is the same as “+libdir+”, but when searching “nocase” libraries for
|
||
module files, case will not be taken as significant. This is useful when the
|
||
library is on a case insensitive file system.</p>
|
||
</li>
|
||
<li><p>+libext+*suffix-string*</p>
|
||
<p>Declare the suffix strings to use when searching library directories for
|
||
Verilog files. The compiler may test a list of suffix strings to support a
|
||
variety of naming conventions.</p>
|
||
</li>
|
||
<li><p>-y dir-path</p>
|
||
<p>This is like “+libdir+” but each line takes only one path. Like “+libdir+”
|
||
there can be multiple “-y” records to declare multiple library
|
||
directories. This is similar to the “-y” flag on the iverilog command line.</p>
|
||
</li>
|
||
<li><p>-v <em>file-name</em> or -l <em>file-name</em></p>
|
||
<p>This declares a library file. A library file is just like any other Verilog
|
||
source file, except that modules declared within it are not implicitly
|
||
possible root modules.</p>
|
||
<p>NOTE: The “-l” alias is new as of 2 October 2016. It will become available
|
||
in releases and snapshots made after that date.</p>
|
||
</li>
|
||
<li><p>+incdir+*include-dir-path*</p>
|
||
<p>Declare a directory or list of directories to search for files included by
|
||
the “include” compiler directive. The directories are searched in
|
||
order. This is similar to the “-I” flag on the iverilog command line.</p>
|
||
</li>
|
||
<li><p>+define+*name=value*</p>
|
||
<p>Define the preprocessor symbol “name” to have the string value “value”. If
|
||
the value (and the “=”) are omitted, then it is assumed to be the string
|
||
“1”. This is similar to the “-D” on the iverilog command line.</p>
|
||
</li>
|
||
<li><p>+timescale+*units/precision*</p>
|
||
<p>Define the default timescale. This is the timescale that is used if there is
|
||
no other timescale directive in the Verilog source. The compiler default
|
||
default is “+timescale+1s/1s”, which this command file setting can
|
||
change. The format of the units/precision is the same as that for the
|
||
timescale directive in the verilog source.</p>
|
||
</li>
|
||
<li><p>+toupper-filename</p>
|
||
<p>This token causes file names after this in the command file to be translated
|
||
to uppercase. this helps with situations where a directory has passed
|
||
through a DOS machine (or a FAT file system) and in the process the file
|
||
names become munged. This is not meant to be used in general, but only in
|
||
emergencies.</p>
|
||
</li>
|
||
<li><p>+tolower-filename</p>
|
||
<p>The is the lowercase version of “+toupper-filename”.</p>
|
||
</li>
|
||
<li><p>+parameter+*name=value*</p>
|
||
<p>This token causes the compiler to override a parameter value for a top-level
|
||
module. For example, if the module main has the parameter WIDTH, set the
|
||
width like this “+parameter+main.WIDTH=5”. Note the use of the complete
|
||
hierarchical name. This currently only works for parameters defined in root
|
||
(top level) modules and a defparam may override the command file value.</p>
|
||
</li>
|
||
<li><p>+vhdl-work+*path*</p>
|
||
<p>When compiling VHDL, this token allows control over the directory to use for
|
||
holding working package declarations. For example, “+vhdl-work+workdir” will
|
||
cause the directory “workdir” to be used as a directory for holding working
|
||
working copies of package headers.</p>
|
||
</li>
|
||
</ul>
|
||
</section>
|
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