115 lines
4.2 KiB
C++
115 lines
4.2 KiB
C++
#ifndef IVL_functor_H
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#define IVL_functor_H
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/*
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* Copyright (c) 1999-2016 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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/*
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* The functor is an object that can be applied to a design to
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* transform it. This is different from the target_t, which can only
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* scan the design but not transform it in any way.
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*
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* When a functor it scanning a process, signal or node, the functor
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* is free to manipulate the list by deleting items, including the
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* node being scanned. The Design class scanner knows how to handle
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* the situation. However, if objects are added to the netlist, there
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* is no guarantee that object will be scanned unless the functor is
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* rerun.
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*/
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class Design;
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class NetNet;
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class NetProcTop;
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struct functor_t {
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virtual ~functor_t();
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/* Events are scanned here. */
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virtual void event(class Design*des, class NetEvent*);
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/* This is called once for each signal in the design. */
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virtual void signal(class Design*des, class NetNet*);
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/* This method is called for each process in the design. */
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virtual void process(class Design*des, class NetProcTop*);
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/* This method is called for each structural abs(). */
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virtual void lpm_abs(class Design*des, class NetAbs*);
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/* This method is called for each structural adder. */
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virtual void lpm_add_sub(class Design*des, class NetAddSub*);
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/* This method is called for each structural comparator. */
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virtual void lpm_compare(class Design*des, class NetCompare*);
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/* This method is called for each structural concatenation. */
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virtual void lpm_concat(class Design*des, class NetConcat*);
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/* This method is called for each structural constant. */
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virtual void lpm_const(class Design*des, class NetConst*);
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/* This method is called for each structural constant. */
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virtual void lpm_divide(class Design*des, class NetDivide*);
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/* Constant literals. */
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virtual void lpm_literal(class Design*des, class NetLiteral*);
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/* This method is called for each structural constant. */
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virtual void lpm_modulo(class Design*des, class NetModulo*);
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/* This method is called for each FF in the design. */
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virtual void lpm_ff(class Design*des, class NetFF*);
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/* This method is called for each LATCH in the design. */
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virtual void lpm_latch(class Design*des, class NetLatch*);
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/* Handle LPM combinational logic devices. */
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virtual void lpm_logic(class Design*des, class NetLogic*);
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/* This method is called for each multiplier. */
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virtual void lpm_mult(class Design*des, class NetMult*);
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/* This method is called for each MUX. */
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virtual void lpm_mux(class Design*des, class NetMux*);
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virtual void lpm_part_select(class Design*des, class NetPartSelect*);
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/* This method is called for each power. */
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virtual void lpm_pow(class Design*des, class NetPow*);
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/* This method is called for each part substitute. */
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virtual void lpm_substitute(class Design*des, class NetSubstitute*);
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/* This method is called for each unary reduction gate. */
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virtual void lpm_ureduce(class Design*des, class NetUReduce*);
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virtual void sign_extend(class Design*des, class NetSignExtend*);
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};
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struct proc_match_t {
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virtual ~proc_match_t();
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virtual int assign(class NetAssign*);
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virtual int assign_nb(class NetAssignNB*);
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virtual int condit(class NetCondit*);
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virtual int event_wait(class NetEvWait*);
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virtual int block(class NetBlock*);
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};
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#endif /* IVL_functor_H */
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