54 lines
1.7 KiB
VHDL
54 lines
1.7 KiB
VHDL
-- Copyright (c) 2015 CERN
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-- Maciej Suminski <maciej.suminski@cern.ch>
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--
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-- This source code is free software; you can redistribute it
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-- and/or modify it in source code form under the terms of the GNU
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-- General Public License as published by the Free Software
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-- Foundation; either version 2 of the License, or (at your option)
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-- any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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-- Test for 'range, 'left and 'right attributes in VHDL subprograms.
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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package range_func_pkg is
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function negator (word_i : std_logic_vector(3 downto 0)) return std_logic_vector;
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function reverse (word_i : std_logic_vector(3 downto 0)) return std_logic_vector;
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end range_func_pkg;
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package body range_func_pkg is
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function negator (word_i : std_logic_vector(3 downto 0)) return std_logic_vector is
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variable neg : std_logic_vector(word_i'left downto word_i'right);
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begin
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for I in word_i'range loop
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neg (I) := not word_i(I);
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end loop;
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return neg;
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end function;
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function reverse (word_i : std_logic_vector(3 downto 0)) return std_logic_vector is
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variable rev : std_logic_vector(3 downto 0);
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begin
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for I in word_i'right to word_i'left loop
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rev (rev'left - I) := word_i(I);
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end loop;
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return rev;
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end function;
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end range_func_pkg;
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