36 lines
778 B
Verilog
36 lines
778 B
Verilog
int num1 = 201; string str1 = "unit2";
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int num2 = 202; string str2 = "unit2";
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int num3 = 203; string str3 = "unit2";
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module m3();
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int num2 = 232; string str2 = "m3";
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initial begin
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#2; // allow m1 to go first
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m2.m1inst.obj.display;
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$display("%d from %s", num1, str1);
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$display("%d from %s", num2, str2);
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$display("%d from %s", num3, str3);
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$display("%d from %s", m4.num4, m4.str4);
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end
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/* This should not change the result, but Icarus ignores the order in
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which variables are declared and used.
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int num3 = 113; string str3 = "m3";
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*/
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endmodule
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module m4();
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int num1 = 241; string str1 = "m4";
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int num2 = 242; string str2 = "m4";
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int num3 = 243; string str3 = "m4";
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int num4 = 244; string str4 = "m4";
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m3 m3inst();
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endmodule
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