24 lines
524 B
Verilog
24 lines
524 B
Verilog
// Check that a store to am entry of real typed array with an immediate index
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// works if it happes after a comparison that sets vvp flag 4 to 0.
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module test;
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integer a = 0;
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real r[1:0];
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initial begin
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if (a == 0) begin
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// Make sure that this store happens, even though the compare above
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// cleared set vvp flag 4
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r[0] = 1.23;
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end
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if (r[0] == 1.23) begin
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$display("PASSED");
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end else begin
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$display("FAILED. Expected %f, got %f", 1.23, r[0]);
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end
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end
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endmodule
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