21 lines
361 B
Verilog
21 lines
361 B
Verilog
program main;
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int foo;
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int bar;
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initial begin
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bar = 1;
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for (foo = 1 ; foo < 10 ; ++foo) begin
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bar <= bar * foo;
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#1 $display("foo = %d, bar=%d", foo, bar);
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end
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end
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final begin
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if (foo !== 10 || bar !== 362_880) begin
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$display("FAILED -- foo=%d", foo);
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end else $display("PASSED");
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end
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endprogram // main
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