This website requires JavaScript.
Explore
Help
Register
Sign In
luke
/
iverilog
mirror of
https://github.com/steveicarus/iverilog.git
Watch
1
Star
0
Fork
You've already forked iverilog
0
Code
Issues
Packages
Projects
Releases
Wiki
Activity
20d82bbdcb
iverilog
/
ivtest
/
ivltests
/
pr3190948.v
4 lines
81 B
Verilog
Raw
Blame
History
(
*
foo
,
bar
=
1
*
)
(
*
baz
=
1
*
)
module
foo
;
initial
$display
(
"
PASSED
"
)
;
endmodule
Reference in New Issue
View Git Blame
Copy Permalink