26 lines
501 B
Verilog
26 lines
501 B
Verilog
module test;
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parameter foo = 5;
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initial $display("%m foo = %d", foo);
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endmodule
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module test_defparam;
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test U_test();
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defparam U_test.foo = 2;
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endmodule
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module test_inline;
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test #(.foo(2)) U_test();
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endmodule
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module testcase_defparam;
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test_defparam test_defparam_a();
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test_defparam test_defparam_b();
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test_defparam test_defparam_c();
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endmodule
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module testcase_inline;
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test_inline test_inline_a();
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test_inline test_inline_b();
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test_inline test_inline_c();
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endmodule
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