22 lines
298 B
Verilog
22 lines
298 B
Verilog
// Copyright 2008, Martin Whitaker.
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// This file may be freely copied for any purpose.
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module localparam_sign();
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localparam P1 = 16;
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localparam P2 = P1 * 2;
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submodule #(P2) submodule();
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endmodule
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module submodule();
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parameter P3 = 1;
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initial begin
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$display("P3 = %0d", P3);
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end
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endmodule
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