This website requires JavaScript.
Explore
Help
Register
Sign In
luke
/
iverilog
mirror of
https://github.com/steveicarus/iverilog.git
Watch
1
Star
0
Fork
You've already forked iverilog
0
Code
Issues
Packages
Projects
Releases
Wiki
Activity
20d82bbdcb
iverilog
/
ivtest
/
ivltests
/
indef_width_concat.v
6 lines
90 B
Verilog
Raw
Blame
History
module
top
;
parameter
pval
=
1
;
initial
$display
(
"
Concat: %d
"
,
{
pval
,
2
}
)
;
endmodule
Reference in New Issue
View Git Blame
Copy Permalink