30 lines
437 B
Verilog
30 lines
437 B
Verilog
// Test disable statements inside a constant function
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module constfunc10();
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function [31:0] pow2(input [5:0] x);
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begin:body
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pow2 = 1;
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while (1) begin:loop
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if (x == 0) disable body;
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pow2 = 2 * pow2;
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x = x - 1;
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disable loop;
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pow2 = 0;
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end
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end
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endfunction
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localparam val = pow2(8);
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initial begin
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$display("%0d", val);
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if (val === 256)
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$display("PASSED");
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else
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$display("FAILED");
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end
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endmodule
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