31 lines
345 B
Verilog
31 lines
345 B
Verilog
module example();
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reg [7:0] scale, a, b;
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wire [7:0] c;
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function [7:0] scaled;
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input [7:0] value;
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begin
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scaled = value * scale;
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end
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endfunction
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assign c = scaled(a) + scaled(b);
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initial begin
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#1 a = 2;
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#1 scale = 2;
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#1 b = 3;
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#1 $display(c);
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if (c === 10)
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$display("PASSED");
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else
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$display("FAILED");
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end
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endmodule
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