19 lines
299 B
Verilog
19 lines
299 B
Verilog
// Test that cast to enum works in continuous assignments
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module test();
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typedef enum { a, b, c } enum_type;
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enum_type enum_value;
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assign enum_value = enum_type'(1);
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initial begin
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if (enum_value == b) begin
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$display("PASSED");
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end else begin
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$display("FAILED");
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end
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end
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endmodule
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