111 lines
2.8 KiB
Verilog
111 lines
2.8 KiB
Verilog
// Check behaviour with out-of-range and undefined array indices
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// on LHS of procedural continuous (net) assignment.
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`ifdef __ICARUS__
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`define SUPPORT_CONST_OUT_OF_RANGE_IN_IVTEST
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`define SUPPORT_REAL_NETS_IN_IVTEST
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`endif
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module top;
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wire [1:0] array1[2:1];
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wire [1:0] array2[1:0];
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reg [1:0] var1;
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assign array1[1] = 2'd0;
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assign array1[2] = 2'd0;
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assign array2[0] = 2'd0;
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assign array2[1] = 2'd0;
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`ifdef SUPPORT_REAL_NETS_IN_IVTEST
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wire real array3[2:1];
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wire real array4[1:0];
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real var2;
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assign array3[1] = 0.0;
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assign array3[2] = 0.0;
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assign array4[0] = 0.0;
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assign array4[1] = 0.0;
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`endif
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reg failed;
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initial begin
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failed = 0;
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`ifdef SUPPORT_CONST_OUT_OF_RANGE_IN_IVTEST
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force array1[0] = 2'd1;
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#1 $display("array = %h %h", array1[2], array1[1]);
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if ((array1[1] !== 2'd0) || (array1[2] !== 2'd0)) failed = 1;
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release array1[0];
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`endif
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force array1[1] = 2'd1;
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#1 $display("array = %h %h", array1[2], array1[1]);
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if ((array1[1] !== 2'd1) || (array1[2] !== 2'd0)) failed = 1;
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release array1[1];
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force array1[2] = var1;
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var1 = 2'd1;
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#1 $display("array = %h %h", array1[2], array1[1]);
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if ((array1[1] !== 2'd0) || (array1[2] !== 2'd1)) failed = 1;
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var1 = 2'd2;
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#1 $display("array = %h %h", array1[2], array1[1]);
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if ((array1[1] !== 2'd0) || (array1[2] !== 2'd2)) failed = 1;
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release array1[2];
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`ifdef SUPPORT_CONST_OUT_OF_RANGE_IN_IVTEST
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force array1[3] = var1;
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#1 $display("array = %h %h", array1[2], array1[1]);
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if ((array1[1] !== 2'd0) || (array1[2] !== 2'd0)) failed = 1;
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release array1[3];
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force array2['bx] = 2'd1;
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#1 $display("array = %h %h", array2[1], array2[0]);
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if ((array2[0] !== 2'd0) || (array2[1] !== 2'd0)) failed = 1;
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release array2['bx];
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`endif
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`ifdef SUPPORT_REAL_NETS_IN_IVTEST
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force array3[0] = 1.0;
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#1 $display("array = %0g %0g", array3[2], array3[1]);
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if ((array3[1] != 0.0) || (array3[2] != 0.0)) failed = 1;
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release array3[0];
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force array3[1] = 1.0;
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#1 $display("array = %0g %0g", array3[2], array3[1]);
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if ((array3[1] != 1.0) || (array3[2] != 0.0)) failed = 1;
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release array3[1];
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force array3[2] = var2;
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var2 = 1.0;
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#1 $display("array = %0g %0g", array3[2], array3[1]);
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if ((array3[1] != 0.0) || (array3[2] != 1.0)) failed = 1;
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var2 = 2.0;
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#1 $display("array = %0g %0g", array3[2], array3[1]);
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if ((array3[1] != 0.0) || (array3[2] != 2.0)) failed = 1;
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release array3[2];
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force array3[3] = var2;
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#1 $display("array = %0g %0g", array3[2], array3[1]);
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if ((array3[1] != 0.0) || (array3[2] != 0.0)) failed = 1;
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release array3[3];
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force array4['bx] = 1.0;
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#1 $display("array = %0g %0g", array4[1], array4[0]);
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if ((array4[0] != 0.0) || (array4[1] != 0.0)) failed = 1;
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release array4['bx];
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`endif
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if (failed)
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$display("FAILED");
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else
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$display("PASSED");
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end
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endmodule
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