43 lines
700 B
Verilog
43 lines
700 B
Verilog
nature Voltage;
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units = "V";
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access = V;
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idt_nature = Flux;
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abstol = 1e-6;
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endnature
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nature Flux;
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units = "Wb";
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access = Phi;
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ddt_nature = Voltage;
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abstol = 1e-9;
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endnature
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discipline voltage;
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potential Voltage;
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enddiscipline
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module main;
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real value;
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voltage out;
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analog V(out) <+ abs(value);
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initial begin
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value = 1.0;
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#1 if (V(out) != abs(value)) begin
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$display("FAILED -- value=%g, res=%g", value, V(out));
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$finish;
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end
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value = -1.0;
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#1 if (V(out) != abs(value)) begin
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$display("FAILED -- value=%g, res=%f", value, V(out));
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$finish;
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end
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$display("PASSED");
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end
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endmodule // main
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