612 lines
16 KiB
C
612 lines
16 KiB
C
/*
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* Copyright (c) 2003-2010 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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# include "edif.h"
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# include <stdlib.h>
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# include <string.h>
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# include <assert.h>
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# include "ivl_alloc.h"
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typedef enum property_e {
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PRP_NONE = 0,
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PRP_STRING,
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PRP_INTEGER
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} property_t;
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struct cellref_property_ {
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const char*name;
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property_t ptype;
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union {
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const char*str;
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long num;
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} value_;
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struct cellref_property_*next;
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};
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struct edif_s {
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const char*name;
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/* List the ports of the design. */
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unsigned nports;
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struct __cell_port*ports;
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/* All the external libraries attached to me. */
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edif_xlibrary_t xlibs;
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/* list the cellref instances. */
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edif_cellref_t celref;
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/* The root instance has cellref properties as well. */
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struct cellref_property_*property;
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/* Keep a list of all the nexa */
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struct edif_joint_s*nexa;
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};
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struct edif_xlibrary_s {
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/* Name of this library. */
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const char*name;
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/* The cells that are contained in this library. */
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struct edif_cell_s*cells;
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/* point to the optional celltable. */
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const struct edif_xlib_celltable*celltable;
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/* used to list libraries in an edif_t. */
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struct edif_xlibrary_s*next;
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};
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struct __cell_port {
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const char*name;
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const char*ename;
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struct cellref_property_*property;
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ivl_signal_port_t dir;
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};
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struct edif_cell_s {
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const char*name;
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edif_xlibrary_t xlib;
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unsigned nports;
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struct __cell_port*ports;
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struct cellref_property_*property;
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struct edif_cell_s*next;
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};
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struct edif_cellref_s {
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struct edif_cell_s* cell;
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unsigned u;
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struct cellref_property_*property;
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struct edif_cellref_s* next;
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};
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struct joint_cell_ {
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struct edif_cellref_s*cell;
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unsigned port;
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struct joint_cell_*next;
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};
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struct edif_joint_s {
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const char*name;
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struct joint_cell_*links;
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struct edif_joint_s*next;
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};
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static int is_edif_name(const char*text)
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{
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static const char*edif_name_chars = "abcdefghijklmnopqrstuvwxyz"
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"ABCDEFGHIJKLMNOPQRSTUVWXYZ"
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"0123456789";
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return (strspn(text, edif_name_chars) == strlen(text));
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}
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edif_t edif_create(const char*design_name, unsigned nports)
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{
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edif_t edf = malloc(sizeof(struct edif_s));
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edf->name = design_name;
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edf->nports= nports;
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edf->ports = nports? calloc(nports, sizeof(struct __cell_port)) : 0;
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edf->celref= 0;
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edf->xlibs = 0;
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edf->property = 0;
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edf->nexa = 0;
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return edf;
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}
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void edif_portconfig(edif_t edf, unsigned idx,
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const char*name, ivl_signal_port_t dir)
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{
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assert(idx < edf->nports);
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edf->ports[idx].name = name;
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if (is_edif_name(name)) {
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edf->ports[idx].ename = 0;
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} else {
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char buf[16];
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sprintf(buf, "PORT%u", idx);
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edf->ports[idx].ename = strdup(buf);
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}
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edf->ports[idx].dir = dir;
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}
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void edif_port_to_joint(edif_joint_t jnt, edif_t edf, unsigned port)
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{
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struct joint_cell_* jc = malloc(sizeof(struct joint_cell_));
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jc->cell = 0;
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jc->port = port;
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jc->next = jnt->links;
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jnt->links = jc;
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}
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void edif_pstring(edif_t edf, const char*name, const char*value)
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{
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struct cellref_property_*prp = malloc(sizeof(struct cellref_property_));
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prp->name = name;
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prp->ptype = PRP_STRING;
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prp->value_.str = value;
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prp->next = edf->property;
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edf->property = prp;
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}
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edif_xlibrary_t edif_xlibrary_create(edif_t edf, const char*name)
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{
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edif_xlibrary_t xlib = malloc(sizeof(struct edif_xlibrary_s));
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xlib->name = name;
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xlib->cells = 0;
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xlib->celltable = 0;
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xlib->next = edf->xlibs;
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edf->xlibs = xlib;
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return xlib;
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}
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void edif_xlibrary_set_celltable(edif_xlibrary_t xlib,
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const struct edif_xlib_celltable*tab)
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{
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assert(xlib->celltable == 0);
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xlib->celltable = tab;
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}
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edif_cell_t edif_xlibrary_findcell(edif_xlibrary_t xlib,
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const char*cell_name)
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{
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const struct edif_xlib_celltable*tcur;
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edif_cell_t cur;
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for (cur = xlib->cells ; cur ; cur = cur->next) {
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if (strcmp(cell_name, cur->name) == 0)
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return cur;
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}
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if (xlib->celltable == 0)
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return 0;
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for (tcur = xlib->celltable ; tcur->cell_name ; tcur += 1)
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if (strcmp(cell_name, tcur->cell_name) == 0) {
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return (tcur->cell_func)(xlib);
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}
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return 0;
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}
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edif_cell_t edif_xlibrary_scope_cell(edif_xlibrary_t xlib,
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ivl_scope_t scope)
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{
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unsigned port_count, idx;
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edif_cell_t cur;
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/* Check to see if the cell is already somehow defined. */
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cur = edif_xlibrary_findcell(xlib, ivl_scope_tname(scope));
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if (cur) return cur;
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/* Count the ports of the scope. */
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port_count = 0;
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for (idx = 0 ; idx < ivl_scope_sigs(scope) ; idx += 1) {
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ivl_signal_t sig = ivl_scope_sig(scope, idx);
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if (ivl_signal_port(sig) == IVL_SIP_NONE)
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continue;
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port_count += 1;
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}
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cur = edif_xcell_create(xlib, ivl_scope_tname(scope), port_count);
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port_count = 0;
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for (idx = 0 ; idx < ivl_scope_sigs(scope) ; idx += 1) {
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ivl_signal_t sig = ivl_scope_sig(scope, idx);
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if (ivl_signal_port(sig) == IVL_SIP_NONE)
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continue;
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edif_cell_portconfig(cur, port_count,
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ivl_signal_basename(sig),
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ivl_signal_port(sig));
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port_count += 1;
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}
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return cur;
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}
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edif_cell_t edif_xcell_create(edif_xlibrary_t xlib, const char*name,
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unsigned nports)
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{
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unsigned idx;
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edif_cell_t cell = malloc(sizeof(struct edif_cell_s));
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cell->name = name;
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cell->xlib = xlib;
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cell->nports = nports;
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cell->ports = calloc(nports, sizeof(struct __cell_port));
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cell->property = 0;
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for (idx = 0 ; idx < nports ; idx += 1) {
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cell->ports[idx].name = "?";
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cell->ports[idx].dir = IVL_SIP_NONE;
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cell->ports[idx].property = 0;
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}
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cell->next = xlib->cells;
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xlib->cells = cell;
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return cell;
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}
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void edif_cell_portconfig(edif_cell_t cell, unsigned idx,
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const char*name, ivl_signal_port_t dir)
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{
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assert(idx < cell->nports);
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cell->ports[idx].name = name;
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cell->ports[idx].dir = dir;
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}
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void edif_cell_port_pstring(edif_cell_t cell, unsigned idx,
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const char*name, const char*value)
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{
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struct cellref_property_*prp = malloc(sizeof(struct cellref_property_));
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prp->name = name;
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prp->ptype = PRP_STRING;
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prp->value_.str = value;
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prp->next = cell->ports[idx].property;
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cell->ports[idx].property = prp;
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}
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unsigned edif_cell_port_byname(edif_cell_t cell, const char*name)
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{
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unsigned idx = 0;
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for (idx = 0 ; idx < cell->nports ; idx += 1)
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if (strcmp(name, cell->ports[idx].name) == 0)
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break;
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return idx;
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}
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void edif_cell_pstring(edif_cell_t cell, const char*name,
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const char*value)
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{
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struct cellref_property_*prp = malloc(sizeof(struct cellref_property_));
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prp->name = name;
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prp->ptype = PRP_STRING;
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prp->value_.str = value;
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prp->next = cell->property;
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cell->property = prp;
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}
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void edif_cell_pinteger(edif_cell_t cell, const char*name,
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int value)
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{
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struct cellref_property_*prp = malloc(sizeof(struct cellref_property_));
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prp->name = name;
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prp->ptype = PRP_INTEGER;
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prp->value_.num = value;
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prp->next = cell->property;
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cell->property = prp;
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}
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edif_cellref_t edif_cellref_create(edif_t edf, edif_cell_t cell)
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{
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static unsigned u_number = 0;
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edif_cellref_t ref = malloc(sizeof(struct edif_cellref_s));
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u_number += 1;
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assert(cell);
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assert(edf);
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ref->u = u_number;
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ref->cell = cell;
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ref->property = 0;
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ref->next = edf->celref;
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edf->celref = ref;
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return ref;
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}
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void edif_cellref_pstring(edif_cellref_t ref, const char*name,
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const char*value)
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{
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struct cellref_property_*prp = malloc(sizeof(struct cellref_property_));
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prp->name = name;
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prp->ptype = PRP_STRING;
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prp->value_.str = value;
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prp->next = ref->property;
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ref->property = prp;
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}
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void edif_cellref_pinteger(edif_cellref_t ref, const char*name, int value)
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{
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struct cellref_property_*prp = malloc(sizeof(struct cellref_property_));
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prp->name = name;
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prp->ptype = PRP_INTEGER;
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prp->value_.num = value;
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prp->next = ref->property;
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ref->property = prp;
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}
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edif_joint_t edif_joint_create(edif_t edf)
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{
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edif_joint_t jnt = malloc(sizeof(struct edif_joint_s));
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jnt->name = 0;
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jnt->links = 0;
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jnt->next = edf->nexa;
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edf->nexa = jnt;
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return jnt;
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}
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edif_joint_t edif_joint_of_nexus(edif_t edf, ivl_nexus_t nex)
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{
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void*tmp = ivl_nexus_get_private(nex);
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edif_joint_t jnt;
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if (tmp == 0) {
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jnt = edif_joint_create(edf);
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ivl_nexus_set_private(nex, jnt);
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return jnt;
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}
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jnt = (edif_joint_t) tmp;
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return jnt;
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}
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void edif_joint_rename(edif_joint_t jnt, const char*name)
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{
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assert(jnt->name == 0);
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jnt->name = name;
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}
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void edif_add_to_joint(edif_joint_t jnt, edif_cellref_t cell, unsigned port)
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{
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struct joint_cell_* jc = malloc(sizeof(struct joint_cell_));
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jc->cell = cell;
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jc->port = port;
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jc->next = jnt->links;
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jnt->links = jc;
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}
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static void fprint_property(FILE*fd, const struct cellref_property_*prp)
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{
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fprintf(fd, "(property %s ", prp->name);
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switch (prp->ptype) {
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case PRP_NONE:
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break;
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case PRP_STRING:
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fprintf(fd, "(string \"%s\")", prp->value_.str);
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break;
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case PRP_INTEGER:
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fprintf(fd, "(integer %ld)", prp->value_.num);
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break;
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}
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fprintf(fd, ")");
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}
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/*
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* This function takes all the data structures that have been
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* assembled by the code generator, and writes them into an EDIF
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* formatted file.
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*/
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void edif_print(FILE*fd, edif_t edf)
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{
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edif_xlibrary_t xlib;
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edif_cell_t cell;
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edif_cellref_t ref;
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edif_joint_t jnt;
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struct cellref_property_*prp;
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unsigned idx;
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fprintf(fd, "(edif %s\n", edf->name);
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fprintf(fd, " (edifVersion 2 0 0)\n");
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fprintf(fd, " (edifLevel 0)\n");
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fprintf(fd, " (keywordMap (keywordLevel 0))\n");
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fprintf(fd, " (status\n");
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fprintf(fd, " (written\n");
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fprintf(fd, " (timeStamp 0 0 0 0 0 0)\n");
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fprintf(fd, " (author \"unknown\")\n");
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fprintf(fd, " (program \"Icarus Verilog/fpga.tgt\")))\n");
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fflush(fd);
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for (xlib = edf->xlibs ; xlib ; xlib = xlib->next) {
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fprintf(fd, " (external %s "
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"(edifLevel 0) "
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"(technology (numberDefinition))\n",
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xlib->name);
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for (cell = xlib->cells ; cell ; cell = cell->next) {
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fprintf(fd, " (cell %s (cellType GENERIC)\n",
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cell->name);
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fprintf(fd, " (view net\n"
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" (viewType NETLIST)\n"
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" (interface");
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for (idx = 0 ; idx < cell->nports ; idx += 1) {
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struct __cell_port*pp = cell->ports + idx;
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fprintf(fd, "\n (port %s", pp->name);
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switch (pp->dir) {
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case IVL_SIP_INPUT:
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fprintf(fd, " (direction INPUT)");
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break;
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case IVL_SIP_OUTPUT:
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fprintf(fd, " (direction OUTPUT)");
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break;
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case IVL_SIP_INOUT:
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fprintf(fd, " (direction INOUT)");
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break;
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default:
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break;
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}
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for (prp = pp->property ; prp ; prp=prp->next) {
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fprintf(fd, " ");
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fprint_property(fd, prp);
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}
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fprintf(fd, ")");
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}
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for (prp = cell->property ; prp ; prp = prp->next) {
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fprintf(fd, "\n ");
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fprint_property(fd, prp);
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}
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fprintf(fd, ")))\n");
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}
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fprintf(fd, " )\n"); /* terminate (external ...) sexp */
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}
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fflush(fd);
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/* Write out the library header */
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fprintf(fd, " (library DESIGN\n");
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fprintf(fd, " (edifLevel 0)\n");
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fprintf(fd, " (technology (numberDefinition))\n");
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/* The root module is a cell in the library. */
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fprintf(fd, " (cell %s\n", edf->name);
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fprintf(fd, " (cellType GENERIC)\n");
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fprintf(fd, " (view net\n");
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fprintf(fd, " (viewType NETLIST)\n");
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fprintf(fd, " (interface\n");
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for (idx = 0 ; idx < edf->nports ; idx += 1) {
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fprintf(fd, " (port ");
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if (edf->ports[idx].ename == 0)
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fprintf(fd, "%s ", edf->ports[idx].name);
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else
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fprintf(fd, "(rename %s \"%s\") ",
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edf->ports[idx].ename,
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edf->ports[idx].name);
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switch (edf->ports[idx].dir) {
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case IVL_SIP_INPUT:
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fprintf(fd, "(direction INPUT)");
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break;
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case IVL_SIP_OUTPUT:
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fprintf(fd, "(direction OUTPUT)");
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break;
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case IVL_SIP_INOUT:
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fprintf(fd, "(direction INOUT)");
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break;
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default:
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break;
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}
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fprintf(fd, ")\n");
|
|
}
|
|
|
|
fprintf(fd, " )\n"); /* end the (interface ) sexp */
|
|
fflush(fd);
|
|
|
|
fprintf(fd, " (contents\n");
|
|
|
|
/* Display all the instances. */
|
|
for (ref = edf->celref ; ref ; ref = ref->next) {
|
|
|
|
assert(ref->cell);
|
|
|
|
fprintf(fd, "(instance U%u (viewRef net "
|
|
"(cellRef %s (libraryRef %s)))",
|
|
ref->u, ref->cell->name, ref->cell->xlib->name);
|
|
|
|
for (prp = ref->property ; prp ; prp = prp->next) {
|
|
fprintf(fd, " ");
|
|
fprint_property(fd, prp);
|
|
}
|
|
|
|
fprintf(fd, ")\n");
|
|
}
|
|
|
|
fflush(fd);
|
|
|
|
/* Display all the joints. */
|
|
idx = 0;
|
|
for (jnt = edf->nexa ; jnt ; jnt = jnt->next, idx += 1) {
|
|
struct joint_cell_*jc;
|
|
|
|
fprintf(fd, "(net ");
|
|
if (jnt->name != 0)
|
|
fprintf(fd, "(rename N%u \"%s\")", idx, jnt->name);
|
|
else
|
|
fprintf(fd, "N%u", idx);
|
|
fprintf(fd, " (joined");
|
|
|
|
for (jc = jnt->links ; jc ; jc = jc->next) {
|
|
if (jc->cell) {
|
|
fprintf(fd, " (portRef %s (instanceRef U%u))",
|
|
jc->cell->cell->ports[jc->port].name,
|
|
jc->cell->u);
|
|
} else {
|
|
/* Reference to a port of the main cell. */
|
|
if (edf->ports[jc->port].ename)
|
|
fprintf(fd, " (portRef %s)",
|
|
edf->ports[jc->port].ename);
|
|
else
|
|
fprintf(fd, " (portRef %s)",
|
|
edf->ports[jc->port].name);
|
|
}
|
|
}
|
|
fprintf(fd, "))\n");
|
|
}
|
|
|
|
fprintf(fd, " )\n"); /* end the (contents...) sexp */
|
|
|
|
fprintf(fd, " )\n"); /* end the (view ) sexp */
|
|
fprintf(fd, " )\n"); /* end the (cell ) sexp */
|
|
fprintf(fd, " )\n"); /* end the (library DESIGN) sexp */
|
|
|
|
/* Make an instance of the defined object */
|
|
fprintf(fd, " (design %s\n", edf->name);
|
|
fprintf(fd, " (cellRef %s (libraryRef DESIGN))\n", edf->name);
|
|
|
|
for (prp = edf->property ; prp ; prp = prp->next) {
|
|
fprintf(fd, " ");
|
|
fprint_property(fd, prp);
|
|
fprintf(fd, "\n");
|
|
}
|
|
|
|
fprintf(fd, " )\n");
|
|
|
|
|
|
|
|
fprintf(fd, ")\n");
|
|
fflush(fd);
|
|
}
|