mirror of
https://github.com/steveicarus/iverilog.git
synced 2026-08-29 01:03:29 +02:00
Stephen Williams
6c9c876c83
This includes support at the parser (pform) through enaboration and the netlist format for the break and continue statements. Elaboration actually already worked for for-loops, but since the code generators need more information, this is a rewire of that support to be explicit about for-loops. This means they are not rewritten as fancy while loops. The code generators will have to handle that. Given the elaboration of for-loops now work, write the vvp code generator support needed to implement it. Now that for-loops are presented as for-loops to the code generator, the vlog95 code generator doesn't need to infer them anymore. Generate the code more directly. Also update the tests list so that the vlog95_reg tests all pass.
618 lines
17 KiB
C
618 lines
17 KiB
C
/*
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* Copyright (c) 2004-2021 Stephen Williams ([email protected])
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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# include "config.h"
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# include "priv.h"
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# include <assert.h>
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/*
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* If the l-value signal is a darray object, then the ivl_lval_idx()
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* gets you the array index expression.
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*/
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static unsigned show_assign_lval_darray(ivl_lval_t lval, unsigned ind)
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{
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ivl_signal_t sig = ivl_lval_sig(lval);
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assert(sig);
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fprintf(out, "%*s{name=%s darray width=%u l-value width=%u}\n",
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ind, "",
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ivl_signal_name(sig),
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ivl_signal_width(sig),
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ivl_lval_width(lval));
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if (ivl_lval_idx(lval)) {
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fprintf(out, "%*sAddress-0 select of ", ind+4, "");
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show_type_of_signal(sig);
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fprintf(out, ":\n");
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show_expression(ivl_lval_idx(lval), ind+6);
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}
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if (ivl_lval_part_off(lval)) {
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fprintf(out, "%*sERROR: unexpected Part select expression:\n", ind+4, "");
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stub_errors += 1;
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show_expression(ivl_lval_part_off(lval), ind+8);
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}
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return ivl_lval_width(lval);
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}
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static unsigned show_assign_lval_class(ivl_lval_t lval, unsigned ind)
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{
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ivl_signal_t sig = ivl_lval_sig(lval);
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int sig_prop = ivl_lval_property_idx(lval);
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assert(sig);
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/* If there is no property select, then this l-value is for
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the class handle itself. */
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if (sig_prop < 0) {
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fprintf(out, "%*s{name=%s class object}\n", ind, "", ivl_signal_name(sig));
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if (ivl_lval_width(lval) != 1) {
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fprintf(out, "%*sERROR: ivl_lval_width should be 1 for class objects\n",
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ind+4, "");
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stub_errors += 1;
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}
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return ivl_lval_width(lval);
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}
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fprintf(out, "%*s{name=%s.<property-%d> l-value width=%u}\n",
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ind, "", ivl_signal_name(sig), sig_prop, ivl_lval_width(lval));
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if (ivl_lval_idx(lval)) {
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ivl_expr_t mux = ivl_lval_idx(lval);
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fprintf(out, "%*sAddress-0 select expression:\n", ind+4, "");
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show_expression(mux, ind+6);
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}
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return ivl_lval_width(lval);
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}
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unsigned width_of_type(ivl_type_t net)
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{
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switch (ivl_type_packed_dimensions(net)) {
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case 0:
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return 1;
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case 1: {
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int msb = ivl_type_packed_msb(net,0);
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int lsb = ivl_type_packed_lsb(net,0);
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if (msb > lsb)
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return msb-lsb+1;
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else
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return lsb-msb+1;
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}
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default:
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return 0;
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}
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}
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static ivl_type_t show_assign_lval_nest(ivl_lval_t lval, unsigned ind)
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{
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ivl_type_t sub_type;
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if (ivl_lval_nest(lval)) {
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fprintf(out, "%*s{nested lval property=%d}\n", ind, "",
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ivl_lval_property_idx(lval));
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sub_type = show_assign_lval_nest(ivl_lval_nest(lval), ind+4);
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} else {
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assert(ivl_lval_sig(lval));
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ivl_signal_t sig = ivl_lval_sig(lval);
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fprintf(out, "%*s{name=%s property=%d, signal width=%u l-value width=%u}\n",
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ind, "",
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ivl_signal_name(sig),
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ivl_lval_property_idx(lval),
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ivl_signal_width(sig),
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ivl_lval_width(lval));
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sub_type = ivl_signal_net_type(sig);
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}
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assert(ivl_type_base(sub_type) == IVL_VT_CLASS);
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ivl_type_t lval_type = ivl_type_prop_type(sub_type, ivl_lval_property_idx(lval));
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return lval_type;
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}
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static unsigned show_assign_lval(ivl_lval_t lval, unsigned ind)
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{
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ivl_lval_t lval_nest = ivl_lval_nest(lval);
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if (lval_nest) {
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ivl_type_t net_type = show_assign_lval_nest(lval, ind);
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return width_of_type(net_type);
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}
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ivl_signal_t sig = ivl_lval_sig(lval);
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assert(sig);
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/* Special case: target signal is a darray. */
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if (ivl_signal_data_type(sig) == IVL_VT_DARRAY)
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return show_assign_lval_darray(lval, ind);
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/* Special case: target signal is a class. */
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if (ivl_signal_data_type(sig) == IVL_VT_CLASS)
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return show_assign_lval_class(lval, ind);
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fprintf(out, "%*s{name=%s signal width=%u l-value width=%u}\n",
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ind, "",
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ivl_signal_name(sig),
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ivl_signal_width(sig),
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ivl_lval_width(lval));
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if (ivl_lval_idx(lval)) {
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fprintf(out, "%*sAddress-0 select expression:\n", ind+4, "");
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show_expression(ivl_lval_idx(lval), ind+6);
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if (ivl_signal_dimensions(sig) < 1) {
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fprintf(out, "%*sERROR: Address on signal with "
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"array dimensions=%u\n", ind+4, "",
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ivl_signal_dimensions(sig));
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stub_errors += 1;
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}
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} else if (ivl_signal_array_count(sig) > 1) {
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fprintf(out, "%*sERROR: Address missing on signal with "
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"word count=%u\n", ind+4, "",
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ivl_signal_array_count(sig));
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stub_errors += 1;
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}
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if (ivl_lval_part_off(lval)) {
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fprintf(out, "%*sPart select base:\n", ind+4, "");
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show_expression(ivl_lval_part_off(lval), ind+8);
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}
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return ivl_lval_width(lval);
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}
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static void show_stmt_cassign(ivl_statement_t net, unsigned ind)
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{
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unsigned idx;
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unsigned lwid = 0;
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fprintf(out, "%*sCONTINUOUS ASSIGN <lwidth=%u>\n", ind, "",
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ivl_stmt_lwidth(net));
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for (idx = 0 ; idx < ivl_stmt_lvals(net) ; idx += 1) {
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lwid += show_assign_lval(ivl_stmt_lval(net, idx), ind+4);
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}
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fprintf(out, "%*sTotal expected l-value width: %u bits\n",
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ind+4, "", lwid);
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show_expression(ivl_stmt_rval(net), ind+4);
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}
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static void show_stmt_delayx(ivl_statement_t net, unsigned ind)
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{
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fprintf(out, "%*s#(X) /* calculated delay */\n", ind, "");
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show_expression(ivl_stmt_delay_expr(net), ind+4);
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show_statement(ivl_stmt_sub_stmt(net), ind+2);
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}
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static void show_stmt_disable(ivl_statement_t net, unsigned ind)
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{
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ivl_scope_t scope = ivl_stmt_call(net);
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if (scope) {
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fprintf(out, "%*sdisable %s\n", ind, "", ivl_scope_basename(scope));
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} else {
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fprintf(out, "%*sdisable fork\n", ind, "");
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}
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}
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static void show_stmt_force(ivl_statement_t net, unsigned ind)
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{
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unsigned idx;
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unsigned lwid = 0;
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fprintf(out, "%*sforce <lwidth=%u>\n", ind, "",
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ivl_stmt_lwidth(net));
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for (idx = 0 ; idx < ivl_stmt_lvals(net) ; idx += 1) {
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lwid += show_assign_lval(ivl_stmt_lval(net, idx), ind+4);
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}
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fprintf(out, "%*sTotal expected l-value width: %u bits\n",
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ind+4, "", lwid);
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show_expression(ivl_stmt_rval(net), ind+4);
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}
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static void show_stmt_forloop(ivl_statement_t net, unsigned ind)
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{
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fprintf(out, "%*sFOR-LOOP\n", ind, "");
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show_expression(ivl_stmt_cond_expr(net), ind+4);
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show_statement(ivl_stmt_init_stmt(net), ind+2);
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show_statement(ivl_stmt_sub_stmt(net), ind+2);
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show_statement(ivl_stmt_step_stmt(net), ind+2);
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}
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static void show_stmt_release(ivl_statement_t net, unsigned ind)
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{
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unsigned idx;
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unsigned lwid = 0;
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fprintf(out, "%*srelease <lwidth=%u>\n", ind, "",
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ivl_stmt_lwidth(net));
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for (idx = 0 ; idx < ivl_stmt_lvals(net) ; idx += 1) {
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lwid += show_assign_lval(ivl_stmt_lval(net, idx), ind+4);
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}
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fprintf(out, "%*sTotal l-value width: %u bits\n",
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ind+4, "", lwid);
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}
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/*
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* A trigger statement is the "-> name;" syntax in Verilog, where a
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* trigger signal is sent to a named event. The trigger statement is
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* actually a very simple object.
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*/
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static void show_stmt_trigger(ivl_statement_t net, unsigned ind)
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{
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unsigned cnt = ivl_stmt_nevent(net);
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unsigned idx;
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fprintf(out, "%*s->", ind, "");
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for (idx = 0 ; idx < cnt ; idx += 1) {
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ivl_event_t event = ivl_stmt_events(net, idx);
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fprintf(out, " %s", ivl_event_basename(event));
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}
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/* The compiler should make exactly one target event, so if we
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find more or less, then print some error text. */
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if (cnt != 1) {
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fprintf(out, " /* ERROR: Expect one target event, got %u */", cnt);
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}
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fprintf(out, ";\n");
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}
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/*
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* A non-blocking trigger statement is the "->> name;" syntax in Verilog,
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* where a non-blocking trigger signal is sent to a named event. The trigger
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* statement is actually a very simple object.
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*/
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static void show_stmt_nb_trigger(ivl_statement_t net, unsigned ind)
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{
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unsigned cnt = ivl_stmt_nevent(net);
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unsigned idx;
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fprintf(out, "%*s->>", ind, "");
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ivl_expr_t delay = ivl_stmt_delay_expr(net);
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if (delay) {
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fprintf(out, " #(");
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show_expression(ivl_stmt_delay_expr(net), ind+4);
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fprintf(out, ")");
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}
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for (idx = 0 ; idx < cnt ; idx += 1) {
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ivl_event_t event = ivl_stmt_events(net, idx);
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fprintf(out, " %s", ivl_event_basename(event));
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}
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/* The compiler should make exactly one target event, so if we
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find more or less, then print some error text. */
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if (cnt != 1) {
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fprintf(out, " /* ERROR: Expect one target event, got %u */", cnt);
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}
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fprintf(out, ";\n");
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}
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/*
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* The wait statement contains simply an array of events to wait on,
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* and a sub-statement to execute when an event triggers.
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*/
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static void show_stmt_wait(ivl_statement_t net, unsigned ind)
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{
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unsigned idx;
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const char*comma = "";
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fprintf(out, "%*s", ind, "");
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/* Emit a SystemVerilog wait fork. */
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if ((ivl_stmt_nevent(net) == 1) && (ivl_stmt_events(net, 0) == 0)) {
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assert(ivl_statement_type(ivl_stmt_sub_stmt(net)) == IVL_ST_NOOP);
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fprintf(out, "wait fork;\n");
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return;
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}
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fprintf(out, "@(");
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for (idx = 0 ; idx < ivl_stmt_nevent(net) ; idx += 1) {
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ivl_event_t evnt = ivl_stmt_events(net, idx);
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if (evnt == 0)
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fprintf(out, "%s/*ERROR*/", comma);
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else
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fprintf(out, "%s%s.%s", comma,
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ivl_scope_name(ivl_event_scope(evnt)),
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ivl_event_basename(evnt));
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comma = ", ";
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}
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fprintf(out, ")\n");
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show_statement(ivl_stmt_sub_stmt(net), ind+4);
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}
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void show_statement(ivl_statement_t net, unsigned ind)
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{
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unsigned idx;
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char opcode = 0;
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unsigned lwid = 0;
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const ivl_statement_type_t code = ivl_statement_type(net);
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switch (code) {
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case IVL_ST_ALLOC:
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fprintf(out, "%*sallocate automatic storage ...\n", ind, "");
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break;
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case IVL_ST_ASSIGN:
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opcode = ivl_stmt_opcode(net);
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if (opcode == 0)
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opcode = ' ';
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fprintf(out, "%*sASSIGN <lwidth=%u> opcode=%c\n", ind, "",
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ivl_stmt_lwidth(net), opcode);
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for (idx = 0 ; idx < ivl_stmt_lvals(net) ; idx += 1)
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lwid += show_assign_lval(ivl_stmt_lval(net, idx), ind+4);
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if (ivl_stmt_delay_expr(net))
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show_expression(ivl_stmt_delay_expr(net), idx+4);
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if (ivl_stmt_rval(net))
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show_expression(ivl_stmt_rval(net), ind+4);
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fprintf(out, "%*sTotal l-value width is %u\n", ind+2, "", lwid);
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break;
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case IVL_ST_ASSIGN_NB:
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fprintf(out, "%*sASSIGN_NB <lwidth=%u>\n", ind, "",
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ivl_stmt_lwidth(net));
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for (idx = 0 ; idx < ivl_stmt_lvals(net) ; idx += 1)
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show_assign_lval(ivl_stmt_lval(net, idx), ind+4);
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if (ivl_stmt_delay_expr(net)) {
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fprintf(out, "%*s<internal delay>\n", ind+4, "");
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show_expression(ivl_stmt_delay_expr(net), ind+6);
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}
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if (ivl_stmt_rval(net))
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show_expression(ivl_stmt_rval(net), ind+4);
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break;
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case IVL_ST_BLOCK: {
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unsigned cnt = ivl_stmt_block_count(net);
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ivl_scope_t sscope = ivl_stmt_block_scope(net);
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if (sscope)
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fprintf(out, "%*sbegin : %s\n", ind, "",
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ivl_scope_name(sscope));
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else
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fprintf(out, "%*sbegin\n", ind, "");
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for (idx = 0 ; idx < cnt ; idx += 1) {
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ivl_statement_t cur = ivl_stmt_block_stmt(net, idx);
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show_statement(cur, ind+4);
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}
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fprintf(out, "%*send\n", ind, "");
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break;
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}
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case IVL_ST_BREAK: {
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fprintf(out, "%*sbreak;\n", ind, "");
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break;
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}
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case IVL_ST_CASEX:
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case IVL_ST_CASEZ:
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case IVL_ST_CASER:
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case IVL_ST_CASE: {
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ivl_case_quality_t qual = ivl_stmt_case_quality(net);
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unsigned cnt = ivl_stmt_case_count(net);
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const char*qual_txt = "";
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switch (qual) {
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case IVL_CASE_QUALITY_BASIC:
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qual_txt = "basic";
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break;
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case IVL_CASE_QUALITY_UNIQUE:
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qual_txt = "unique";
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break;
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case IVL_CASE_QUALITY_UNIQUE0:
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qual_txt = "unique0";
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break;
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case IVL_CASE_QUALITY_PRIORITY:
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qual_txt = "priority";
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break;
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}
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fprintf(out, "%*scase (...) <%u cases, %s>\n", ind, "", cnt, qual_txt);
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show_expression(ivl_stmt_cond_expr(net), ind+4);
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for (idx = 0 ; idx < cnt ; idx += 1) {
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ivl_expr_t ex = ivl_stmt_case_expr(net, idx);
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ivl_statement_t st = ivl_stmt_case_stmt(net, idx);
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if (ex == 0)
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fprintf(out, "%*sdefault\n", ind+4, "");
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else
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show_expression(ex, ind+4);
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show_statement(st, ind+4);
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}
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fprintf(out, "%*sendcase\n", ind, "");
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break;
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}
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case IVL_ST_CASSIGN:
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show_stmt_cassign(net, ind);
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break;
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case IVL_ST_CONDIT: {
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ivl_expr_t ex = ivl_stmt_cond_expr(net);
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ivl_statement_t t = ivl_stmt_cond_true(net);
|
|
ivl_statement_t f = ivl_stmt_cond_false(net);
|
|
|
|
fprintf(out, "%*sif (...)\n", ind, "");
|
|
if (ex) {
|
|
show_expression(ex, ind+4);
|
|
} else {
|
|
fprintf(out, "%*sERROR: Condition expression is NIL;\n", ind+4, "");
|
|
stub_errors += 1;
|
|
}
|
|
if (t)
|
|
show_statement(t, ind+4);
|
|
else
|
|
fprintf(out, "%*s;\n", ind+4, "");
|
|
|
|
if (f) {
|
|
fprintf(out, "%*selse\n", ind, "");
|
|
show_statement(f, ind+4);
|
|
}
|
|
|
|
break;
|
|
}
|
|
case IVL_ST_CONTINUE: {
|
|
fprintf(out, "%*scontinue;\n", ind, "");
|
|
break;
|
|
}
|
|
|
|
|
|
case IVL_ST_CONTRIB:
|
|
fprintf(out, "%*sCONTRIBUTION ( <+ )\n", ind, "");
|
|
show_expression(ivl_stmt_lexp(net), ind+4);
|
|
show_expression(ivl_stmt_rval(net), ind+4);
|
|
break;
|
|
|
|
case IVL_ST_DEASSIGN:
|
|
fprintf(out, "%*sDEASSIGN <lwidth=%u>\n", ind, "",
|
|
ivl_stmt_lwidth(net));
|
|
|
|
for (idx = 0 ; idx < ivl_stmt_lvals(net) ; idx += 1)
|
|
show_assign_lval(ivl_stmt_lval(net, idx), ind+4);
|
|
|
|
break;
|
|
|
|
case IVL_ST_DELAY:
|
|
fprintf(out, "%*s#%" PRIu64 "\n", ind, "", ivl_stmt_delay_val(net));
|
|
show_statement(ivl_stmt_sub_stmt(net), ind+2);
|
|
break;
|
|
|
|
case IVL_ST_DELAYX:
|
|
show_stmt_delayx(net, ind);
|
|
break;
|
|
|
|
case IVL_ST_DISABLE:
|
|
show_stmt_disable(net, ind);
|
|
break;
|
|
|
|
case IVL_ST_DO_WHILE:
|
|
fprintf(out, "%*sdo\n", ind, "");
|
|
show_statement(ivl_stmt_sub_stmt(net), ind+2);
|
|
fprintf(out, "%*swhile\n", ind, "");
|
|
show_expression(ivl_stmt_cond_expr(net), ind+4);
|
|
break;
|
|
|
|
case IVL_ST_FORCE:
|
|
show_stmt_force(net, ind);
|
|
break;
|
|
|
|
case IVL_ST_FORK: {
|
|
unsigned cnt = ivl_stmt_block_count(net);
|
|
fprintf(out, "%*sfork\n", ind, "");
|
|
for (idx = 0 ; idx < cnt ; idx += 1) {
|
|
ivl_statement_t cur = ivl_stmt_block_stmt(net, idx);
|
|
show_statement(cur, ind+4);
|
|
}
|
|
fprintf(out, "%*sjoin\n", ind, "");
|
|
break;
|
|
}
|
|
|
|
case IVL_ST_FORK_JOIN_ANY: {
|
|
unsigned cnt = ivl_stmt_block_count(net);
|
|
fprintf(out, "%*sfork\n", ind, "");
|
|
for (idx = 0 ; idx < cnt ; idx += 1) {
|
|
ivl_statement_t cur = ivl_stmt_block_stmt(net, idx);
|
|
show_statement(cur, ind+4);
|
|
}
|
|
fprintf(out, "%*sjoin_any\n", ind, "");
|
|
break;
|
|
}
|
|
|
|
case IVL_ST_FORK_JOIN_NONE: {
|
|
unsigned cnt = ivl_stmt_block_count(net);
|
|
fprintf(out, "%*sfork\n", ind, "");
|
|
for (idx = 0 ; idx < cnt ; idx += 1) {
|
|
ivl_statement_t cur = ivl_stmt_block_stmt(net, idx);
|
|
show_statement(cur, ind+4);
|
|
}
|
|
fprintf(out, "%*sjoin_none\n", ind, "");
|
|
break;
|
|
}
|
|
|
|
case IVL_ST_FORLOOP:
|
|
show_stmt_forloop(net, ind);
|
|
break;
|
|
|
|
case IVL_ST_FREE:
|
|
fprintf(out, "%*sfree automatic storage ...\n", ind, "");
|
|
break;
|
|
|
|
case IVL_ST_NOOP:
|
|
fprintf(out, "%*s/* noop */;\n", ind, "");
|
|
break;
|
|
|
|
case IVL_ST_RELEASE:
|
|
show_stmt_release(net, ind);
|
|
break;
|
|
|
|
case IVL_ST_STASK: {
|
|
fprintf(out, "%*sCall %s(%u parameters); /* %s:%u */\n",
|
|
ind, "", ivl_stmt_name(net), ivl_stmt_parm_count(net),
|
|
ivl_stmt_file(net), ivl_stmt_lineno(net));
|
|
for (idx = 0 ; idx < ivl_stmt_parm_count(net) ; idx += 1)
|
|
if (ivl_stmt_parm(net, idx))
|
|
show_expression(ivl_stmt_parm(net, idx), ind+4);
|
|
break;
|
|
}
|
|
|
|
case IVL_ST_TRIGGER:
|
|
show_stmt_trigger(net, ind);
|
|
break;
|
|
|
|
case IVL_ST_NB_TRIGGER:
|
|
show_stmt_nb_trigger(net, ind);
|
|
break;
|
|
|
|
case IVL_ST_UTASK:
|
|
fprintf(out, "%*scall task ...\n", ind, "");
|
|
break;
|
|
|
|
case IVL_ST_WAIT:
|
|
show_stmt_wait(net, ind);
|
|
break;
|
|
|
|
case IVL_ST_WHILE:
|
|
fprintf(out, "%*swhile\n", ind, "");
|
|
show_expression(ivl_stmt_cond_expr(net), ind+4);
|
|
show_statement(ivl_stmt_sub_stmt(net), ind+2);
|
|
break;
|
|
|
|
default:
|
|
fprintf(out, "%*sunknown statement type (%d)\n", ind, "", code);
|
|
}
|
|
}
|