21 lines
392 B
Verilog
21 lines
392 B
Verilog
// Check that imported identifiers can't be accessed through hierarchical names.
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package P;
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integer x;
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endpackage
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module test;
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initial begin : outer
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integer y;
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begin: inner
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import P::x;
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y = x;
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end
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y = inner.x; // This should fail. Imported identifiers are not visible
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// through hierarchical names.
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$display("FAILED");
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end
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endmodule
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