mirror of
https://github.com/steveicarus/iverilog.git
synced 2026-09-07 03:43:19 +02:00
Cary R
3c4b9692a6
When padding a signal or when creating a local signal the file and line information should be related to where the new object was created not the signal value it is being created from. This patch modifies the NetE* pad_to_width() routines to take a LineInfo object to set the location to the correct value. It fixes some set_line() calls to use the correct location. It fixes ports to not set the file/line information if it is already defined. Doing this was causing the definition of signals to become the instantiation instead of the real module declaration.
142 lines
4.3 KiB
C++
142 lines
4.3 KiB
C++
/*
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* Copyright (c) 1999-2008 Stephen Williams ([email protected])
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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# include "config.h"
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# include "netlist.h"
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# include "netmisc.h"
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/*
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* This function transforms an expression by padding the high bits
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* with V0 until the expression has the desired width. This may mean
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* not transforming the expression at all, if it is already wide
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* enough.
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*/
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NetExpr*pad_to_width(NetExpr*expr, unsigned wid, const LineInfo&info)
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{
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if (wid <= expr->expr_width())
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return expr;
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/* If the expression is a const, then replace it with a wider
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const. This is a more efficient result. */
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if (NetEConst*tmp = dynamic_cast<NetEConst*>(expr)) {
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verinum oval = pad_to_width(tmp->value(), wid);
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tmp = new NetEConst(oval);
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tmp->set_line(info);
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delete expr;
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return tmp;
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}
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NetESelect*tmp = new NetESelect(expr, 0, wid);
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tmp->set_line(info);
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tmp->cast_signed(expr->has_sign());
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return tmp;
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}
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/*
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* Pad a NetNet to the desired vector width by concatenating a
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* NetConst of constant zeros. Use a NetConcat node to do the
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* concatenation.
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*/
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NetNet*pad_to_width(Design*des, NetNet*net, unsigned wid, const LineInfo&info)
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{
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NetScope*scope = net->scope();
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if (net->vector_width() >= wid)
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return net;
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// Make the NetConcat and connect the input net to the lsb input.
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NetConcat*cc = new NetConcat(scope, scope->local_symbol(), wid, 2);
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des->add_node(cc);
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connect(cc->pin(1), net->pin(0));
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// Make a NetConst of the desired width and connect in to the
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// lsb input of the NetConcat.
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verinum pad(verinum::V0, wid - net->vector_width());
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NetConst*con = new NetConst(scope, scope->local_symbol(), pad);
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des->add_node(con);
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connect(cc->pin(2), con->pin(0));
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// Make a NetNet for the NetConst to NetConcat link.
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NetNet*tmp = new NetNet(scope, scope->local_symbol(),
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NetNet::WIRE, wid - net->vector_width());
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tmp->data_type( net->data_type() );
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tmp->set_line(info);
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tmp->local_flag(true);
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connect(cc->pin(2), tmp->pin(0));
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// Create a NetNet of the output width and connect it to the
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// NetConcat node output pin.
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tmp = new NetNet(scope, scope->local_symbol(),
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NetNet::WIRE, wid);
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tmp->data_type( net->data_type() );
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tmp->set_line(info);
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tmp->local_flag(true);
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connect(cc->pin(0), tmp->pin(0));
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return tmp;
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}
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NetNet*pad_to_width_signed(Design*des, NetNet*net, unsigned wid,
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const LineInfo&info)
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{
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NetScope*scope = net->scope();
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if (net->vector_width() >= wid)
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return net;
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NetSignExtend*se
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= new NetSignExtend(scope, scope->local_symbol(), wid);
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se->set_line(info);
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des->add_node(se);
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NetNet*tmp = new NetNet(scope, scope->local_symbol(), NetNet::WIRE, wid);
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tmp->set_line(info);
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tmp->local_flag(true);
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tmp->data_type(net->data_type());
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tmp->set_signed(true);
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connect(tmp->pin(0), se->pin(0));
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connect(se->pin(1), net->pin(0));
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return tmp;
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}
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NetNet*crop_to_width(Design*des, NetNet*net, unsigned wid)
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{
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NetScope*scope = net->scope();
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if (net->vector_width() <= wid)
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return net;
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NetPartSelect*ps = new NetPartSelect(net, 0, wid, NetPartSelect::VP);
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des->add_node(ps);
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ps->set_line(*net);
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NetNet*tmp = new NetNet(scope, scope->local_symbol(),
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NetNet::WIRE, wid);
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tmp->data_type(net->data_type());
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tmp->local_flag(true);
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tmp->set_line(*tmp);
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connect(ps->pin(0), tmp->pin(0));
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return tmp;
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}
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