256 lines
9.5 KiB
C
256 lines
9.5 KiB
C
#ifndef __target_H
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#define __target_H
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/*
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* Copyright (c) 1998-2003 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: target.h,v 1.69 2005/01/24 05:28:31 steve Exp $"
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#endif
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# include "netlist.h"
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/*
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* This header file describes the types and constants used to describe
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* the possible target output types of the compiler. The backends
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* provide one of these in order to tell the previous steps what the
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* backend is able to do.
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*/
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/*
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* The backend driver is hooked into the compiler, and given a name,
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* by creating an instance of the target structure. The structure has
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* the name that the compiler will use to locate the driver, and a
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* pointer to a target_t object that is the actual driver.
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*/
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struct target {
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const char* name;
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struct target_t* meth;
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};
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/*
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* The emit process uses a target_t driver to send the completed
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* design to a file. It is up to the driver object to follow along in
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* the iteration through the design, generating output as it can.
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*/
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struct target_t {
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virtual ~target_t();
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/* Start the design. This sets the main output file stream
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that the target should use. */
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virtual bool start_design(const Design*) =0;
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/* This is called once for each scope in the design, before
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anything else is called. */
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virtual void scope(const NetScope*);
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/* Output an event object. Called for each named event in the scope. */
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virtual void event(const NetEvent*);
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/* Output a signal (called for each signal) */
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virtual void signal(const NetNet*) =0;
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/* Output a memory (called for each memory object) */
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virtual void memory(const NetMemory*);
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/* Output an event object. Called for each named event in the scope. */
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virtual void variable(const NetVariable*);
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/* Output a defined task. */
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virtual void task_def(const NetScope*);
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virtual bool func_def(const NetScope*);
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/* LPM style components are handled here. */
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virtual void lpm_add_sub(const NetAddSub*);
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virtual void lpm_clshift(const NetCLShift*);
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virtual void lpm_compare(const NetCompare*);
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virtual void lpm_divide(const NetDivide*);
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virtual void lpm_modulo(const NetModulo*);
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virtual void lpm_ff(const NetFF*);
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virtual void lpm_mult(const NetMult*);
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virtual void lpm_mux(const NetMux*);
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virtual void lpm_ram_dq(const NetRamDq*);
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virtual bool concat(const NetConcat*);
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virtual bool part_select(const NetPartSelect*);
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/* Output a gate (called for each gate) */
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virtual void logic(const NetLogic*);
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virtual bool bufz(const NetBUFZ*);
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virtual void udp(const NetUDP*);
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virtual void net_case_cmp(const NetCaseCmp*);
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virtual bool net_const(const NetConst*);
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virtual bool net_function(const NetUserFunc*);
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virtual void net_probe(const NetEvProbe*);
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/* Output a process (called for each process). It is up to the
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target to recurse if desired. */
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virtual bool process(const NetProcTop*);
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/* Various kinds of process nodes are dispatched through these. */
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virtual void proc_assign(const NetAssign*);
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virtual void proc_assign_nb(const NetAssignNB*);
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virtual bool proc_block(const NetBlock*);
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virtual void proc_case(const NetCase*);
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virtual bool proc_cassign(const NetCAssign*);
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virtual bool proc_condit(const NetCondit*);
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virtual bool proc_deassign(const NetDeassign*);
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virtual bool proc_delay(const NetPDelay*);
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virtual bool proc_disable(const NetDisable*);
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virtual bool proc_force(const NetForce*);
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virtual void proc_forever(const NetForever*);
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virtual bool proc_release(const NetRelease*);
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virtual void proc_repeat(const NetRepeat*);
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virtual bool proc_trigger(const NetEvTrig*);
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virtual void proc_stask(const NetSTask*);
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virtual void proc_utask(const NetUTask*);
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virtual bool proc_wait(const NetEvWait*);
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virtual void proc_while(const NetWhile*);
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/* Done with the design. The target returns !0 if there is
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some error in the code generation. */
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virtual int end_design(const Design*);
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};
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/* This class is used by the NetExpr class to help with the scanning
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of expressions. */
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struct expr_scan_t {
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virtual ~expr_scan_t();
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virtual void expr_const(const NetEConst*);
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virtual void expr_param(const NetEConstParam*);
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virtual void expr_rparam(const NetECRealParam*);
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virtual void expr_creal(const NetECReal*);
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virtual void expr_concat(const NetEConcat*);
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virtual void expr_memory(const NetEMemory*);
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virtual void expr_event(const NetEEvent*);
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virtual void expr_scope(const NetEScope*);
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virtual void expr_select(const NetESelect*);
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virtual void expr_sfunc(const NetESFunc*);
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virtual void expr_signal(const NetESignal*);
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virtual void expr_ternary(const NetETernary*);
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virtual void expr_ufunc(const NetEUFunc*);
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virtual void expr_unary(const NetEUnary*);
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virtual void expr_variable(const NetEVariable*);
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virtual void expr_binary(const NetEBinary*);
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};
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/* The emit functions take a design and emit it to the output stream
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using the specified target. If the target is given by name, it is
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located in the target_table and used. */
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extern int emit(const Design*des, const char*type);
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/* This function takes a fully qualified verilog name (which may have,
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for example, dots in it) and produces a mangled version that can be
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used by most any language. */
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extern string mangle(const string&str);
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/* This function takes a string and produces an escaped version that can be
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used inside a string constant for a C++ compiler. */
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extern string stresc(const string&str);
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/* This is the table of supported output targets. It is a null
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terminated array of pointers to targets. */
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extern const struct target *target_table[];
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/*
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* $Log: target.h,v $
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* Revision 1.69 2005/01/24 05:28:31 steve
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* Remove the NetEBitSel and combine all bit/part select
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* behavior into the NetESelect node and IVL_EX_SELECT
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* ivl_target expression type.
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*
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* Revision 1.68 2005/01/22 01:06:55 steve
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* Change case compare from logic to an LPM node.
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*
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* Revision 1.67 2004/12/29 23:55:43 steve
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* Unify elaboration of l-values for all proceedural assignments,
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* including assing, cassign and force.
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*
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* Generate NetConcat devices for gate outputs that feed into a
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* vector results. Use this to hande gate arrays. Also let gate
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* arrays handle vectors of gates when the outputs allow for it.
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*
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* Revision 1.66 2004/12/11 02:31:28 steve
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* Rework of internals to carry vectors through nexus instead
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* of single bits. Make the ivl, tgt-vvp and vvp initial changes
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* down this path.
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*
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* Revision 1.65 2004/05/31 23:34:39 steve
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* Rewire/generalize parsing an elaboration of
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* function return values to allow for better
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* speed and more type support.
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*
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* Revision 1.64 2003/05/30 02:55:32 steve
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* Support parameters in real expressions and
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* as real expressions, and fix multiply and
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* divide with real results.
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*
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* Revision 1.63 2003/04/22 04:48:30 steve
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* Support event names as expressions elements.
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*
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* Revision 1.62 2003/03/10 23:40:54 steve
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* Keep parameter constants for the ivl_target API.
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*
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* Revision 1.61 2003/01/26 21:15:59 steve
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* Rework expression parsing and elaboration to
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* accommodate real/realtime values and expressions.
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*
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* Revision 1.60 2002/08/12 01:35:01 steve
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* conditional ident string using autoconfig.
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*
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* Revision 1.59 2002/06/05 03:44:25 steve
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* Add support for memory words in l-value of
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* non-blocking assignments, and remove the special
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* NetAssignMem_ and NetAssignMemNB classes.
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*
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* Revision 1.58 2002/06/04 05:38:44 steve
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* Add support for memory words in l-value of
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* blocking assignments, and remove the special
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* NetAssignMem class.
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*
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* Revision 1.57 2002/03/09 02:10:22 steve
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* Add the NetUserFunc netlist node.
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*
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* Revision 1.56 2002/01/28 00:52:41 steve
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* Add support for bit select of parameters.
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* This leads to a NetESelect node and the
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* vvp code generator to support that.
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*
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* Revision 1.55 2002/01/19 19:02:08 steve
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* Pass back target errors processing conditionals.
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*
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* Revision 1.54 2001/08/25 23:50:03 steve
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* Change the NetAssign_ class to refer to the signal
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* instead of link into the netlist. This is faster
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* and uses less space. Make the NetAssignNB carry
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* the delays instead of the NetAssign_ lval objects.
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*
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* Change the vvp code generator to support multiple
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* l-values, i.e. concatenations of part selects.
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*
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* Revision 1.53 2001/07/27 04:51:44 steve
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* Handle part select expressions as variants of
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* NetESignal/IVL_EX_SIGNAL objects, instead of
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* creating new and useless temporary signals.
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*
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* Revision 1.52 2001/04/22 23:09:46 steve
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* More UDP consolidation from Stephan Boettcher.
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*/
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#endif
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