mirror of
https://github.com/steveicarus/iverilog.git
synced 2026-08-22 05:47:31 +02:00
Martin Whitaker
aad5443a36
When checking for name collisions, the compiler looks for genvar
declarations in the enclosing module rather than in the current
scope, which leads to false positives. The compiler also places
all genvar declarations in the enclosing module scope, even when
the declarations are inside a generate block which has its own
scope. This patch fixes both these faults. It also fixes some
typos and outdated information in comments.
(cherry picked from commit da010db739)
113 lines
3.0 KiB
C++
113 lines
3.0 KiB
C++
/*
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* Copyright (c) 2006,2009 Stephen Williams ([email protected])
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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# include "PGenerate.h"
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# include "PWire.h"
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# include "ivl_assert.h"
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PGenerate::PGenerate(unsigned id)
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: id_number(id)
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{
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direct_nested_ = false;
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parent = 0;
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lexical_scope = 0;
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}
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PGenerate::~PGenerate()
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{
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}
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void PGenerate::add_gate(PGate*gate)
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{
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gates.push_back(gate);
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}
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void PGenerate::probe_for_direct_nesting_(void)
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{
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direct_nested_ = false;
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ivl_assert(*this, scheme_type==GS_CASE_ITEM || scheme_type==GS_CONDIT || scheme_type==GS_ELSE);
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// If this scheme has received an explicit name, then it
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// cannot be direct nested.
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if (scope_name[0] != '$') return;
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if (tasks.size() > 0) return;
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if (funcs.size() > 0) return;
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if (gates.size() > 0) return;
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if (parameters.size() > 0) return;
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if (localparams.size() > 0) return;
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if (events.size() > 0) return;
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if (wires.size() > 0) return;
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if (genvars.size() > 0) return;
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if (behaviors.size() > 0) return;
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if (analog_behaviors.size() > 0) return;
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if (generate_schemes.size() == 0) return;
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switch (generate_schemes.size()) {
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case 1: {
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PGenerate*child = generate_schemes.front();
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if (child->scheme_type == GS_CONDIT)
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direct_nested_ = true;
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if (child->scheme_type == GS_CASE)
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direct_nested_ = true;
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break;
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}
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case 2: {
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PGenerate*child1 = generate_schemes.front();
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PGenerate*child2 = generate_schemes.back();
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if (child1->scheme_type==GS_CONDIT && child2->scheme_type==GS_ELSE)
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direct_nested_ = true;
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if (child2->scheme_type==GS_CONDIT && child1->scheme_type==GS_ELSE)
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direct_nested_ = true;
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break;
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}
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}
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}
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ostream& operator << (ostream&out, PGenerate::scheme_t type)
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{
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switch (type) {
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case PGenerate::GS_NONE:
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out << "GS_NONE";
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break;
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case PGenerate::GS_LOOP:
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out << "GS_LOOP";
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break;
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case PGenerate::GS_CONDIT:
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out << "GS_CONDIT";
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break;
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case PGenerate::GS_ELSE:
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out << "GS_ELSE";
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break;
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case PGenerate::GS_CASE:
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out << "GS_CASE";
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break;
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case PGenerate::GS_CASE_ITEM:
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out << "GS_CASE_ITEM";
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break;
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case PGenerate::GS_NBLOCK:
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out << "GS_NBLOCK";
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break;
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}
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return out;
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}
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