124 lines
3.5 KiB
Makefile
124 lines
3.5 KiB
Makefile
#
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# Copyright 2003 Stephen Williams (steve at icarus.com)
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# This source code is free software; you can redistribute it
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# and/or modify it in source code form under the terms of the GNU
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# Library General Public License as published by the Free Software
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# Foundation; either version 2 of the License, or (at your option)
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# any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU Library General Public License for more details.
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#
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# You should have received a copy of the GNU Library General Public
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# License along with this program; if not, write to the Free
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# Software Foundation, Inc.,
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# 59 Temple Place - Suite 330
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# Boston, MA 02111-1307, USA
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#
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SHELL = /bin/sh
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suffix = @install_suffix@
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prefix = @prefix@
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exec_prefix = @exec_prefix@
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srcdir = @srcdir@
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mandir = @mandir@
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datarootdir = @datarootdir@
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VPATH = $(srcdir)
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bindir = @bindir@
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libdir = @libdir@
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includedir = $(prefix)/include
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CC = @CC@
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INSTALL = @INSTALL@
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INSTALL_PROGRAM = @INSTALL_PROGRAM@
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INSTALL_DATA = @INSTALL_DATA@
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CPPFLAGS = -I.. -I$(srcdir) -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ @PICFLAG@
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CFLAGS = -Wall @CFLAGS@
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LDFLAGS = @LDFLAGS@
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all: dep fpga.tgt
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dep:
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mkdir dep
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%.o: %.c
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$(CC) $(CPPFLAGS) $(CFLAGS) -MD -c $< -o $*.o
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mv $*.d dep
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D = d-generic.o d-generic-edif.o d-lpm.o d-virtex.o d-virtex2.o
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O = edif.o fpga.o gates.o mangle.o tables.o generic.o xilinx.o $D
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ifeq (@WIN32@,yes)
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TGTLDFLAGS=-L.. -livl
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TGTDEPLIBS=../libivl.a
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else
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TGTLDFLAGS=
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TGTDEPLIBS=
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endif
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fpga.tgt: $O $(TGTDEPLIBS)
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$(CC) @shared@ -o $@ $O $(TGTLDFLAGS)
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iverilog-fpga.ps: $(srcdir)/iverilog-fpga.man
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man -t $(srcdir)/iverilog-fpga.man > iverilog-fpga.ps
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iverilog-fpga.pdf: iverilog-fpga.ps
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ps2pdf iverilog-fpga.ps iverilog-fpga.pdf
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Makefile: $(srcdir)/Makefile.in ../config.status
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../config.status --file=$@
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clean:
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rm -rf *.o dep fpga.tgt
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distclean: clean
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rm -f Makefile config.log
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check: all
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ifeq (@WIN32@,yes)
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INSTALL_DOC = $(prefix)/iverilog-fpga$(suffix).pdf $(mandir)/man1/iverilog-fpga$(suffix).1
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INSTALL_DOCDIR = $(mandir)/man1
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all: iverilog-fpga.pdf
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else
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INSTALL_DOC = $(mandir)/man1/iverilog-fpga$(suffix).1
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INSTALL_DOCDIR = $(mandir)/man1
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endif
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install: all installdirs $(libdir)/ivl$(suffix)/fpga.tgt $(INSTALL_DOC) $(libdir)/ivl$(suffix)/fpga.conf $(libdir)/ivl$(suffix)/fpga-s.conf
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$(libdir)/ivl$(suffix)/fpga.tgt: ./fpga.tgt
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$(INSTALL_PROGRAM) ./fpga.tgt "$(DESTDIR)$(libdir)/ivl$(suffix)/fpga.tgt"
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$(libdir)/ivl$(suffix)/fpga.conf: $(srcdir)/fpga.conf
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$(INSTALL_DATA) $(srcdir)/fpga.conf "$(DESTDIR)$(libdir)/ivl$(suffix)/fpga.conf"
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$(libdir)/ivl$(suffix)/fpga-s.conf: $(srcdir)/fpga-s.conf
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$(INSTALL_DATA) $(srcdir)/fpga-s.conf "$(DESTDIR)$(libdir)/ivl$(suffix)/fpga-s.conf"
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$(mandir)/man1/iverilog-fpga$(suffix).1: $(srcdir)/iverilog-fpga.man
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$(INSTALL_DATA) $(srcdir)/iverilog-fpga.man "$(DESTDIR)$(mandir)/man1/iverilog-fpga$(suffix).1"
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$(prefix)/iverilog-fpga$(suffix).pdf: iverilog-fpga.pdf
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$(INSTALL_DATA) iverilog-fpga.pdf "$(DESTDIR)$(prefix)/iverilog-fpga$(suffix).pdf"
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installdirs: $(srcdir)/../mkinstalldirs
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$(srcdir)/../mkinstalldirs "$(DESTDIR)$(libdir)/ivl$(suffix)"
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uninstall:
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rm -f "$(DESTDIR)$(libdir)/ivl$(suffix)/fpga.tgt"
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rm -f "$(DESTDIR)$(INSTALL_DOC)"
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rm -f "$(DESTDIR)$(libdir)/ivl$(suffix)/fpga-s.conf"
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rm -f "$(DESTDIR)$(libdir)/ivl$(suffix)/fpga.conf"
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-include $(patsubst %.o, dep/%.d, $O)
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