76 lines
2.3 KiB
Plaintext
76 lines
2.3 KiB
Plaintext
:ivl_version "12.0" "vec4-stack";
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:vpi_module "system";
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; Copyright (c) 2001-2015 Stephen Williams (steve@icarus.com)
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;
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; This program is free software; you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation; either version 2 of the License, or
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; (at your option) any later version.
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;
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; This program is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License along
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; with this program; if not, write to the Free Software Foundation, Inc.,
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; 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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; This example is similar to the code that the following Verilog program
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; would generate:
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;
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; module main;
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; reg [7:0] test;
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;
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; initial begin
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; test = 8'h00;
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; $display("test = %b", test);
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; test = 8'hff;
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; $display("test = %b", test);
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; test = 8'hzz;
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; $display("test = %b", test);
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; test = 8'hxx;
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; $display("test = %b", test);
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; end
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; endmodule
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;
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; This example demonstrates a simple blocking assignment to a
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; reg vector within a module.
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main .scope module, "main" "main" 0 0;
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; This declares a "reg" data type named "test" in the current scope.
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; The bit range is given for the purposes of VPI access. The range
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; corresponds to the declaration "reg [7:0] test", so leads to an 8
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; bit wide vector.
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test .var "test", 7 0;
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; Push various 8 bit values to the stack, save them to the variable and
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; then print the value of the variable.
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T0 %pushi/vec4 0, 0, 8; Push 8 bits of 0
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%store/vec4 test, 0, 8;
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%vpi_call 0 0 "$display", "test = %b", test {0 0 0};
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%pushi/vec4 255, 0, 8; Push 8 bits of 1
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%store/vec4 test, 0, 8;
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%vpi_call 0 0 "$display", "test = %b", test {0 0 0};
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%pushi/vec4 0, 255, 8; Push 8 bits of z
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%store/vec4 test, 0, 8;
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%vpi_call 0 0 "$display", "test = %b", test {0 0 0};
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%pushi/vec4 255, 255, 8; Push 8 bits of x
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%store/vec4 test, 0, 8;
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%vpi_call 0 0 "$display", "test = %b", test {0 0 0};
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%end;
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.thread T0;
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:file_names 2;
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"N/A";
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"<interactive>";
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