Commit Graph

1056 Commits

Author SHA1 Message Date
Cary R 27cdd27889 Add .cast/int and update .cast/real.
This patch adds .cast/int and updates .cast/real to act as a local
(temporary) net and to support either a signed or unsigned input.
The vvp_vector4_t class not can convert an arbitrarily sized double
to a vector value. This removes the restriction of lround().

Also document the new statements.
2008-06-20 19:45:18 -07:00
Stephen Williams 37723698dc Handle non-real operands to real division.
This handles the general case of a non-real operand to a real-valued
division. This can turn up if only 1 operand of a divide is real. In
this case the division as a whole is real and the other operand must
be cast to real.

This method creates an extra node, but it should be a very compact
node and this node does no evaluation tricks so in the run time should
be no more expensive then folding the cast into the .arith/div.r itself.
2008-06-17 17:07:19 -07:00
Cary R 6321fb6a92 Pad Octal string value correctly.
This patch changes the base oct to string converter to correctly
pad the top digit. x or xx should display as a single lower case
x when they are located in the top bits. Before these were being
interpreted as 00x or 0xx and displayed X. Also modified the hex
conversion to use this same scheme instead of a loop.
2008-06-16 17:58:16 -07:00
Stephen Williams 69ba009439 Cleanup the resolver function.
First, handle the trivial (but possibly common) resolution cases in
inlined code, and only call the complete function for the complicated
cases. Then clean up the complex function for readability, and account
for the constraints that the front-end function established.
2008-06-16 17:45:08 -07:00
Stephen Williams 86e5762b1c Compact of vvp_vector4_t in arrays.
Arrays of vvp_vector4_t values redundantly store some fields in every
word. Create a special type that stores vvp_vector4_t values in a form
that does not duplicate the width of all the items. This can save a lot
of space when big memories are simulated.
2008-06-16 15:02:07 -07:00
Stephen Williams 49363c660c Remove the duplicate schedule_assign_vector.
The schedule_assign_plucked_vector is a better way to implement the
schedule_assign_vector, or at least no worse, so remove the now
redundent schedule_assign_vector.
2008-06-16 13:40:20 -07:00
Stephen Williams 30d42e2806 Allow l-value part select to be out of bounds.
It is legal (though worthy of a warning, I think) for the part select
of an l-value to me out of bounds, so replace the error message with
a warning, and generate the appropriate code. In the process, clean
up some of the code for signal l-values to divide out the various kinds
of processing that can be done. This cleans things up a bit.
2008-06-14 21:22:55 -07:00
Stephen Williams 9013dcb527 Signed load-and-add for arrays.
The load-and-add for vectors %load/vp0/s can be combined with the
load-and-add for array words, and the %load/avp0/s added to round
out the combinations. This can make for fewer instructions when
words are padded in arithmetic expressions.
2008-06-14 19:59:57 -07:00
Stephen Williams 6521ceaf92 Union scope and parent pointers for signals.
If a signal is part of an array, then it can get its scope from its
parent, so the scope and parent pointers can go into a union.
2008-06-14 16:17:25 -07:00
Stephen Williams f497dbf01e Created too mane vvp_net_t objects?
The functor_ref_lookup() function fills its argument in with the
vvp_net_t* pointer that matches the var name, so there is no need
to create the vvp_net_t object before then.
2008-06-14 15:31:48 -07:00
Stephen Williams 1530594b4b Implement vpiIndex for vpiMemoryWord objects.
The vpiIndex is really just a different view into the same object,
so implement the trickery needed to support a vpiIndex with the
absolute minimum memory cost.
2008-06-13 22:05:19 -07:00
Stephen Williams 6f0d8e8dda Load_add_immediate to work with signed expressions
The %load/vp0 instruction adds a signed value to the signal value being
loaded, but it doesn't allow for a signed source vector. Add the
%load/vp0/s instruction that pads the loaded vector, and add the code
generator details to properly use it.
2008-06-13 20:23:40 -07:00
Stephen Williams 62d7c081dc Sign extend signed vectors when getting vpiIntVal.
When getting values using vpi_get_value, the vpiIntVal is the integer
value and should be sign-extended if the source value is signed.
2008-06-13 19:47:48 -07:00
Cary R f78994b66c Allow &PV<> to reference a VPI object (signal) for the base.
This patch adds code to allow &PV<> to access a VPI object
(signal) for the base of an indexed part select. This
mirrors the code added to &A<>.
2008-06-13 18:42:08 -07:00
Stephen Williams 6f9643df79 Better array statistics.
Allocation counters for arrays and array words of various types.
2008-06-13 17:41:24 -07:00
Stephen Williams aeaf8e8433 Permalloc vvp_net_fun_t objects.
The vvp_net_fun_t objects, and derived objects, are small, and are
created in large quantities. Tightly pack them into permanently
allocated space in order to save on system allocation overhead, and
thus save overall on memory.
2008-06-13 17:08:11 -07:00
Cary R 99a46fd5af Fix incorrect typecast.
This patch fixes an incorrect typecast in vvp/main.cc.
2008-06-13 11:38:18 -07:00
Larry Doolittle eed4ff7e2d Spelling fixes
Mostly comments, but includes quite a few
user-visible error, debug, and help messages.
2008-06-13 08:51:28 -07:00
Stephen Williams 659714f45d Merge branch 'master' of ssh://steve-icarus@icarus.com/home/u/icarus/steve/git/verilog 2008-06-13 08:41:40 -07:00
Larry Doolittle 8f70c5ca35 Add missing include to vvp/vvp_net.h
Fixes FTBFS under gcc-4.3
2008-06-13 08:40:26 -07:00
Stephen Williams 392b162024 Allow canonical part select of net vectors to be larger then the vector
The part select of a vector is converted by the compiler during
elaboration to a 0-based canonical address. But since it is legal
to address bits below the LSB, the canonical address can be negative.
So make the part select base for selecting from signals work with
signed arithmetic and make the code generator generate negative
indices when needed.
2008-06-12 21:41:11 -07:00
Stephen Williams 4af4c8cca9 Permallocate scheduler cells in chunks
Scheduler cells are small objects that come and go in great quantities.
Even though they are allocated and deallocated a lot, they tend to a
steady state quantity, so put together a heap that is unique for each
cell type.

This heap actually saves memory overall because cells are allocated in
chunks, thus eliminating allocator overhead, and they are pulled/pushed
from/to a heap very quickly so that what overhead remains is slight and
bounded.
2008-06-12 19:55:53 -07:00
Stephen Williams 3c4346acb2 ASSIGN transfer data to scheduler efficiently/permalloc vvp_net_t objects.
The vvp_net_t objects are never deleted, so overload the new operator
to do a more space efficient permanent allocation.

The %assign/v instruction copied the vvp_vector4_t object needlessly
on its way to the scheduler. Eliminate that duplication.(cherry picked from commit d0f303463d)
2008-06-12 13:00:31 -07:00
Stephen Williams 2e9970a98c Have vvp_vector8_t avoid allocating tiny scalar arrays.(cherry picked from commit 35fe8fae00) 2008-06-12 12:10:58 -07:00
Stephen Williams 4914b734dc Obvious optimizations of vvp_vector8_t handling.
The vvp_vector8_t constructor and destructor involve memory allocation
so it is best to pass these objects by reference as much as possible.

Also have the islands take more care not to perform resolution if the
inputs aren't really different.

NOTE: This is a port of commit 2f4e5bf5b6
from the "performance" branch, without the resolver scheduling changes.
This was causing test suite variances with pr1820472.v. It looks like
there might be a race in that program anyhow, but for now leave out the
resolver scheduling changes so that the rest of this commit can go in.
2008-06-12 12:08:02 -07:00
Stephen Williams 24da00bd5a Add value change callback for vpiPartSelect.
The __vpiPV objects express themselves as vpiPartSelect objects.
Add support for value change callbacks by attaching the callback
to the signal that we part select from.
2008-06-11 21:28:21 -07:00
Cary R acf010326c Remove the signed/unsigned comparison warning 2008-06-11 19:44:21 -07:00
Stephen Williams d7814ed767 Better handle some vector size matters for %load/v
The %load/v instruction was doing some spurious resizes of the vector
that comes from the signal. Eliminate those resizes that can be
removed, and optimize some that remain.
2008-06-11 14:38:35 -07:00
Stephen Williams 608bad26cf Allow &A<> argument syntax to take a reference to a VPI object.
This allows the array index to be evaluated when the word is accessed,
and that in turn allows access in the ROSYNC scheduler phase to work
properly.
2008-06-10 20:36:31 -07:00
Stephen Williams 70768176f9 Change bit select instruction to a part select.
There is no point in having a bit select instruction and running it in
a loop (always) when we can simply turn it into a part select instruction.
2008-06-10 17:29:47 -07:00
Stephen Williams 694a6ed4a1 Remove some unused opcodes.
Codes from a dfiferent era.
2008-06-10 16:33:34 -07:00
Cary R d78739d163 Make &PV<> put_value work correctly.
This patch finishes the put_value routine for &PV<>. It should
now work as expected.
2008-06-10 15:07:52 -07:00
Larry Doolittle d90ce68f5d Spelling fixes
No code changes.
2008-06-10 15:02:18 -07:00
Larry Doolittle d2c52ff35b Spelling fixes
No code changes.
2008-06-10 15:00:54 -07:00
Larry Doolittle a437b38270 Fix vpip_make_vthr_A prototype with duplicate parameters
Causes FTBFS with gcc-4.3
2008-06-10 14:56:55 -07:00
Cary R 647e53bcbb Make &A<> use the same thread access syntax as &PV<>.
This patch makes &A<> use the same thread access syntax as
&PV<> this is two unsigned numbers separated by a space
instead of a single number.
2008-06-09 21:26:36 -07:00
Cary R 8439fc6c19 Remove two memory leaks.
This patch removes two memory leaks. One in the driver and one
in the runtime.
2008-06-09 21:23:27 -07:00
Stephen Williams a2dc1e0a29 Add means for &A<> to index using a calculated index.
This is not a solution to all the problems, but is a better catch-all
then what is currently there. Allow the index field to be a T<> that
accesses the thread to get the address index.

Note that the lexor.lex currently returns the T<> as a T_SYMBOL, and the
users of T_SYMBOL objects need to interpret the meaning. This is
probably not the best idea, in light of all the other *<> formats that
now exist.
2008-06-08 21:38:35 -07:00
Larry Doolittle f256dfe16e Add missing include to vvp_island.cc
Add # include <string.h>, needed for compilation with gcc-4.3
2008-06-06 20:48:23 -07:00
Cary R 4f97321c75 Add more array word properties.
This patch adds more array word properties.
2008-06-06 20:36:55 -07:00
Stephen Williams 30570adf31 Merge branch 'master' into verilog-ams 2008-06-05 10:52:58 -07:00
Cary R 1c51ac4ac0 For undefined memory words (size == 0) return an X vector.
If a memory word was accessed before it was defined the
code was returning a zero width vector result. Now it
returns an appropriately sized vector of 'x'.
2008-06-05 10:34:18 -07:00
Cary R 17a1358eb6 Remove documentation for memory opcodes.
The memory opcodes %assign/mv, %load/mv and %set/mv
were removed by a previous patch. This one removes
the documentation from opcodes.txt. It also removes
the documentation for the .mem* statements for the
same reason.
2008-06-05 10:31:38 -07:00
Stephen Williams 04a7f7054a Fix problem linking a-side and b-side tran branches.
Tran devices linked in series were not getting properly joined up
due to a problem with the add_branch method.
2008-06-04 20:34:04 -07:00
Stephen Williams e97a1ad610 Try to eliminate excessive processing recursions.
After calculating the A side of a tran[if/vp], the B side is usually
fully specified, so make an effort to push the calculated value through.
2008-06-04 16:10:43 -07:00
Stephen Williams e872310e4b Optimize recursive branch resolution
Recursive branch resolution was scanning every branch end, even though
many branch ends share ports and need not be repeatedly scanned. Handle
marks and flags to cut off recursion where it is not needed so as to
save much run time.
2008-06-04 11:34:26 -07:00
Stephen Williams 95850ac112 Merge branch 'master' into verilog-ams
Conflicts:

	tgt-vvp/vvp_scope.c

Note that the draw_net_input.c takes in a lot of the codes that used
to be in vvp_scope.c, so some changes may have been lost.
2008-06-03 21:17:57 -07:00
Cary R d0e154b830 Clean up dump routines and support of MemoryWord dump.
This patch cleans up the dump routines and adds file and
line number information for errors. It also adds some of
the missing MemoryWord properties so they can now be
dumped and monitored correctly.
2008-06-03 21:04:22 -07:00
Cary R 4010f6e710 Add $simparam and other fixes.
This patch adds $simparam and $simparam$str from Verilog-A.
The analog simulator parameters return 0.0 or N/A. The
vvp_cpu_wordsize system function has been moved into the
$simparam call and is now named CPUWordSize.

This patch also starts the factoring of common code in the
vpi directory. Some routines were renamed.

The priv.c file was renamed to sys_priv.c to match the
include file.

System functions can now have strings put to their output.
2008-06-03 20:56:37 -07:00
Larry Doolittle 523dff7ae7 Fix probable precedence bug
and at least get rid of a compiler warning
2008-06-03 20:50:36 -07:00