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Remove some useless vvp opcodes.

This commit is contained in:
Stephen Williams 2015-09-30 15:41:22 -07:00
parent 571109481f
commit fe7156289b
5 changed files with 29 additions and 79 deletions
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22
tgt-vvp/eval_real.c
View File

@ -247,19 +247,7 @@ static void draw_real_logic_expr(ivl_expr_t expr)
{
draw_eval_vec4(expr);
const char*sign_flag = ivl_expr_signed(expr)? "/s" : "";
if (ivl_expr_width(expr) > 64) {
fprintf(vvp_out, " %%cvt/rv%s;\n", sign_flag);
} else {
int res = allocate_word();
fprintf(vvp_out, " %%ix/vec4%s %d;\n", sign_flag, res);
if (ivl_expr_signed(expr))
fprintf(vvp_out, " %%cvt/rs %d;\n", res);
else
fprintf(vvp_out, " %%cvt/ru %d;\n", res);
clr_word(res);
}
fprintf(vvp_out, " %%cvt/rv%s;\n", sign_flag);
}
static void draw_select_real(ivl_expr_t expr)
@ -535,13 +523,7 @@ void draw_eval_real(ivl_expr_t expr)
if (ivl_expr_value(expr) == IVL_VT_VECTOR) {
draw_eval_vec4(expr);
const char*sign_flag = ivl_expr_signed(expr)? "/s" : "";
int res = allocate_word();
fprintf(vvp_out, " %%ix/vec4%s %d;\n", sign_flag, res);
fprintf(vvp_out, " %%cvt/rs %d;\n", res);
clr_word(res);
fprintf(vvp_out, " %%cvt/rv%s;\n", sign_flag);
} else {
fprintf(stderr, "XXXX Evaluate real expression (%d)\n",

2
vvp/codes.h
View File

@ -79,8 +79,6 @@ extern bool of_CONCAT_STR(vthread_t thr, vvp_code_t code);
extern bool of_CONCATI_STR(vthread_t thr, vvp_code_t code);
extern bool of_CONCAT_VEC4(vthread_t thr, vvp_code_t code);
extern bool of_CONCATI_VEC4(vthread_t thr, vvp_code_t code);
extern bool of_CVT_RS(vthread_t thr, vvp_code_t code);
extern bool of_CVT_RU(vthread_t thr, vvp_code_t code);
extern bool of_CVT_RV(vthread_t thr, vvp_code_t code);
extern bool of_CVT_RV_S(vthread_t thr, vvp_code_t code);
extern bool of_CVT_SR(vthread_t thr, vvp_code_t code);

2
vvp/compile.cc
View File

@ -130,8 +130,6 @@ static const struct opcode_table_s opcode_table[] = {
{ "%concat/vec4", of_CONCAT_VEC4, 0,{OA_NONE, OA_NONE, OA_NONE} },
{ "%concati/str", of_CONCATI_STR, 1,{OA_STRING,OA_NONE, OA_NONE} },
{ "%concati/vec4",of_CONCATI_VEC4,3,{OA_BIT1, OA_BIT2, OA_NUMBER} },
{ "%cvt/rs", of_CVT_RS, 1, {OA_BIT1, OA_NONE, OA_NONE} },
{ "%cvt/ru", of_CVT_RU, 1, {OA_BIT1, OA_NONE, OA_NONE} },
{ "%cvt/rv", of_CVT_RV, 0, {OA_NONE, OA_NONE, OA_NONE} },
{ "%cvt/rv/s", of_CVT_RV_S,0, {OA_NONE, OA_NONE, OA_NONE} },
{ "%cvt/sr", of_CVT_SR, 1, {OA_BIT1, OA_NONE, OA_NONE} },

62
vvp/opcodes.txt
View File

@ -351,31 +351,19 @@ The %concati/vec4 form takes an immediate value and appends it (lsb)
to the value on the top of the stack. See the %pushi/vec4 instruction
for how to describe the immediate value.
* %cvt/sr <bit-l>
* %cvt/rs <bit-l>
Copy a word from r to l, converting it from real to signed integer (sr)
or signed integer to real (rs) in the process. The source and destination
may be the same word address, leading to a convert in place. Precision
may be lost in the conversion.
The %cvt/sr <bit-l> gets the real value from the top of the real value
stack (and pops the value) and writes it to the indexed register.
* %cvt/sr <index>
* %cvt/ur <bit-l>
* %cvt/ru <bit-r>
Copy a word from r to l, converting it from real to unsigned integer (ur)
or signed integer to real (ru) in the process. The source and destination
may be the same word address, leading to a convert in place. Precision
may be lost in the conversion.
Pop a word from the real-value stack, convert it to a signed or
unsigned integer, and write it to the <index> index
register. Precision may be lost in the conversion.
* %cvt/rv <bit-r>, <wid>
* %cvt/rv/s <bit-r>, <wid>
* %cvt/rv
* %cvt/rv/s
The %cvt/rv instruction converts a thread vector starting at <bit-r>
and with the width <wid> to a real word. Push the result onto the real
value stack. Precision may be lost in the conversion.
The %cvt/rv instruction pops a value from the thread vec4 stack and
converts it to a real word. Push the result onto the real value
stack. Precision may be lost in the conversion.
The %cvt/rv/s instruction is the same as %cvt/rv, but treats the thread
vector as a signed value.
@ -896,15 +884,15 @@ The <skip> is the number of top positions on the stack to keep,
before starting to pop. This allows for popping positions other than
the top of the stack.
* %pow <bit-l>, <bit-r>, <wid>
* %pow/s <bit-l>, <bit-r>, <wid>
* %pow
* %pow/s
The %pow opcode raises <bit-l> (unsigned) to the power of <bit-r>
(unsigned) giving an exact integer result. The %pow/s opcode does
the same for signed values, except it uses the double pow() function
to calculate the result so may not produce exact results. The result
replaces the left operand.
The %pow opcode pops the "B" value from the stack, then pops the "A"
value from the stack, then pushes A**B back onto the stack. Of there
are any X or Z bits in A or B, then an X value is pushed onto the
stack instead of a calculated values.
The %pow/s opcode does the same for signed values.
* %pow/wr
@ -1145,17 +1133,6 @@ which implement the push_back (qb) and push_front (qf)
functions. These only apply to queue object, and are distinct from the
dar versions because the begin/front don't exist, by definition.
* %sub <bit-l>, <bit-r>, <wid> (XXXX Old version)
This instruction arithmetically subtracts the right vector out of the
left vector. It accomplishes this by adding to the left vector 1 plus
the 1s complement of the right vector. The carry value is dropped, and
the result, placed in <bit-l>, is the subtraction of <bit-r> from the
input <bit-l>. Both vectors have the same width. If any bits in either
operand are x, then the entire result is x.
See also the %add instruction.
* %sub
This instruction subtracts vec4 values. The right value is popped from
@ -1164,6 +1141,13 @@ from the left, and the result pushed.
See also the %add instruction.
* %subi <vala>, <valb>, <wid>
This instruction pops a value "A" from the vec4 stack, generates a
values "B" from the immediate argument, and pushes A-B.
See also the %addi instruction.
* %sub/wr
This instruction operates on real values in word registers. The right

20
vvp/vthread.cc
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@ -1977,22 +1977,6 @@ bool of_CONCATI_VEC4(vthread_t thr, vvp_code_t cp)
return true;
}
bool of_CVT_RS(vthread_t thr, vvp_code_t cp)
{
int64_t r = thr->words[cp->bit_idx[0]].w_int;
thr->push_real( (double)(r) );
return true;
}
bool of_CVT_RU(vthread_t thr, vvp_code_t cp)
{
uint64_t r = thr->words[cp->bit_idx[0]].w_uint;
thr->push_real( (double)(r) );
return true;
}
/*
* %cvt/rv
*/
@ -2030,6 +2014,9 @@ bool of_CVT_SR(vthread_t thr, vvp_code_t cp)
return true;
}
/*
* %cvt/ur <idx>
*/
bool of_CVT_UR(vthread_t thr, vvp_code_t cp)
{
double r = thr->pop_real();
@ -4348,6 +4335,7 @@ bool of_POP_VEC4(vthread_t thr, vvp_code_t cp)
/*
* %pow
* %pow/s
*/
static bool of_POW_base(vthread_t thr, bool signed_flag)
{