Modify verilog.spec to make it easier to update the version numbers.

This commit is contained in:
Martin Whitaker 2025-01-03 16:36:58 +00:00
parent b000a9cf29
commit fe2e89202e
1 changed files with 3 additions and 1 deletions

View File

@ -1,5 +1,7 @@
#norootforbuild #norootforbuild
# #
%define major 13
%define minor 0
%define rev_date 20221226 %define rev_date 20221226
# Normally, the suff-ix is %nil, meaning the suffix is to not be used. # Normally, the suff-ix is %nil, meaning the suffix is to not be used.
# But if the builder wants to make a suffixed package, he may set this # But if the builder wants to make a suffixed package, he may set this
@ -10,7 +12,7 @@
# #
Summary: Icarus Verilog Summary: Icarus Verilog
Name: verilog%{suff} Name: verilog%{suff}
Version: 13.0.%{rev_date} Version: %{major}.%{minor}.%{rev_date}
Release: 0 Release: 0
License: GPL License: GPL
Group: Productivity/Scientific/Electronics Group: Productivity/Scientific/Electronics