Indexed part selects cannot use real values
This commit is contained in:
parent
095e6daa0a
commit
fdb9465329
58
elab_expr.cc
58
elab_expr.cc
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@ -4146,10 +4146,10 @@ bool PEIdent::calculate_up_do_width_(Design*des, NetScope*scope,
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wid = wid_c ? wid_c->value().as_ulong() : 0;
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if (wid == 0) {
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cerr << index_tail.lsb->get_fileline() << ": error: "
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"Indexed part widths must be constant and greater than zero."
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"Indexed part select width must be an integral constants greater than zero."
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<< endl;
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cerr << index_tail.lsb->get_fileline() << ": : "
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"This part width expression violates the rule: "
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"This width expression violates that rule: "
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<< *index_tail.lsb << endl;
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des->errors += 1;
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flag = false;
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@ -5365,12 +5365,20 @@ NetExpr* PEIdent::elaborate_expr_param_idx_up_(Design*des, NetScope*scope,
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// Use the part select width already calculated by test_width().
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unsigned long wid = min_width_;
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perm_string name = peek_tail_name(path_);
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if (debug_elaborate)
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cerr << get_fileline() << ": debug: Calculate part select "
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<< "[" << *base << "+:" << wid << "] from range "
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<< name << "[" << *base << "+:" << wid << "] from range "
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<< "[" << par_msv << ":" << par_lsv << "]." << endl;
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perm_string name = peek_tail_name(path_);
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if (base->expr_type() == IVL_VT_REAL) {
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cerr << get_fileline() << ": error: Indexed part select base "
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"expression for " << name << "[" << *base << "+:" << wid
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<< "] cannot be a real value." << endl;
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des->errors += 1;
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return 0;
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}
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// Handle the special case that the base is constant. In this
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// case, just precalculate the entire constant result.
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@ -5445,12 +5453,20 @@ NetExpr* PEIdent::elaborate_expr_param_idx_do_(Design*des, NetScope*scope,
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// Use the part select width already calculated by test_width().
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unsigned long wid = min_width_;
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perm_string name = peek_tail_name(path_);
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if (debug_elaborate)
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cerr << get_fileline() << ": debug: Calculate part select "
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<< "[" << *base << "-:" << wid << "] from range "
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<< name << "[" << *base << "-:" << wid << "] from range "
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<< "[" << par_msv << ":" << par_lsv << "]." << endl;
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perm_string name = peek_tail_name(path_);
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if (base->expr_type() == IVL_VT_REAL) {
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cerr << get_fileline() << ": error: Indexed part select base "
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"expression for " << name << "[" << *base << "-:" << wid
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<< "] cannot be a real value." << endl;
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des->errors += 1;
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return 0;
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}
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// Handle the special case that the base is constant. In this
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// case, just precalculate the entire constant result.
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@ -5931,6 +5947,13 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
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NetESignal*net, NetScope*,
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bool need_const) const
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{
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if (net->sig()->data_type() == IVL_VT_STRING) {
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cerr << get_fileline() << ": error: Cannot take the index part "
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"select of a string ('" << net->name() << "')." << endl;
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des->errors += 1;
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return 0;
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}
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list<long>prefix_indices;
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bool rc = calculate_packed_indices_(des, scope, net->sig(), prefix_indices);
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if (!rc)
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@ -5941,6 +5964,14 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
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// Use the part select width already calculated by test_width().
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unsigned long wid = min_width_;
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if (base->expr_type() == IVL_VT_REAL) {
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cerr << get_fileline() << ": error: Indexed part select base "
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"expression for " << net->sig()->name() << "[" << *base
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<< "+:" << wid << "] cannot be a real value." << endl;
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des->errors += 1;
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return 0;
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}
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// Handle the special case that the base is constant as
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// well. In this case it can be converted to a conventional
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// part select.
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@ -6063,6 +6094,13 @@ NetExpr* PEIdent::elaborate_expr_net_idx_do_(Design*des, NetScope*scope,
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NetESignal*net, NetScope*,
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bool need_const) const
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{
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if (net->sig()->data_type() == IVL_VT_STRING) {
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cerr << get_fileline() << ": error: Cannot take the index part "
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"select of a string ('" << net->name() << "')." << endl;
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des->errors += 1;
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return 0;
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}
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list<long>prefix_indices;
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bool rc = calculate_packed_indices_(des, scope, net->sig(), prefix_indices);
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if (!rc)
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@ -6073,6 +6111,14 @@ NetExpr* PEIdent::elaborate_expr_net_idx_do_(Design*des, NetScope*scope,
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// Use the part select width already calculated by test_width().
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unsigned long wid = min_width_;
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if (base->expr_type() == IVL_VT_REAL) {
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cerr << get_fileline() << ": error: Indexed part select base "
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"expression for " << net->sig()->name() << "[" << *base
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<< "-:" << wid << "] cannot be a real value." << endl;
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des->errors += 1;
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return 0;
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}
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// Handle the special case that the base is constant as
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// well. In this case it can be converted to a conventional
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// part select.
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22
elab_lval.cc
22
elab_lval.cc
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@ -814,6 +814,13 @@ bool PEIdent::elaborate_lval_net_idx_(Design*des,
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index_component_t::ctype_t use_sel,
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bool need_const_idx) const
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{
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if (lv->sig()->data_type() == IVL_VT_STRING) {
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cerr << get_fileline() << ": error: Cannot index part select assign to a string ('"
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<< lv->sig()->name() << "')." << endl;
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des->errors += 1;
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return false;
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}
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list<long>prefix_indices;
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bool rc = calculate_packed_indices_(des, scope, lv->sig(), prefix_indices);
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ivl_assert(*this, rc);
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@ -832,6 +839,21 @@ bool PEIdent::elaborate_lval_net_idx_(Design*des,
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calculate_up_do_width_(des, scope, wid);
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NetExpr*base = elab_and_eval(des, scope, index_tail.msb, -1);
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if (base && base->expr_type() == IVL_VT_REAL) {
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cerr << get_fileline() << ": error: Indexed part select base "
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"expression for ";
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cerr << lv->sig()->name() << "[" << *base;
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if (index_tail.sel == index_component_t::SEL_IDX_UP) {
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cerr << "+:";
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} else {
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cerr << "-:";
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}
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cerr << wid << "] cannot be a real value." << endl;
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des->errors += 1;
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return 0;
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}
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ivl_select_type_t sel_type = IVL_SEL_OTHER;
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// Handle the special case that the base is constant. For this
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10
elab_net.cc
10
elab_net.cc
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1999-2022 Stephen Williams (steve@icarus.com)
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* Copyright (c) 1999-2023 Stephen Williams (steve@icarus.com)
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* Copyright CERN 2012 / Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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@ -234,9 +234,11 @@ bool PEIdent::eval_part_select_(Design*des, NetScope*scope, NetNet*sig,
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NetExpr*tmp_ex = elab_and_eval(des, scope, index_tail.msb, -1, true);
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NetEConst*tmp = dynamic_cast<NetEConst*>(tmp_ex);
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if (!tmp) {
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cerr << get_fileline() << ": error: indexed part select of "
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<< sig->name()
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<< " must be a constant in this context." << endl;
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cerr << get_fileline() << ": error: Indexed part select "
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"base expression must be a constant integral value "
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"in this context." << endl;
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cerr << get_fileline() << ": : This expression "
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"violates that rule: " << *index_tail.msb << endl;
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des->errors += 1;
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return 0;
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}
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@ -0,0 +1,54 @@
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./ivltests/ipsdownsel_real_idx.v:13: error: Indexed part select base expression for in[+ridx-:1] cannot be a real value.
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./ivltests/ipsdownsel_real_idx.v:13: error: Unable to elaborate r-value: in[ridx-:'sd1]
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./ivltests/ipsdownsel_real_idx.v:14: error: Indexed part select base expression for in[0.500000-:1] cannot be a real value.
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./ivltests/ipsdownsel_real_idx.v:14: error: Unable to elaborate r-value: in[0.500000-:'sd1]
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./ivltests/ipsdownsel_real_idx.v:15: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsdownsel_real_idx.v:15: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsdownsel_real_idx.v:15: : This width expression violates that rule: ridx
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./ivltests/ipsdownsel_real_idx.v:16: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsdownsel_real_idx.v:16: : This width expression violates that rule: 0.500000
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./ivltests/ipsdownsel_real_idx.v:17: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsdownsel_real_idx.v:17: error: Indexed part select base expression must be a constant integral value in this context.
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./ivltests/ipsdownsel_real_idx.v:17: : This expression violates that rule: ridx
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./ivltests/ipsdownsel_real_idx.v:18: error: Indexed part select base expression must be a constant integral value in this context.
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./ivltests/ipsdownsel_real_idx.v:18: : This expression violates that rule: 0.500000
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./ivltests/ipsdownsel_real_idx.v:19: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsdownsel_real_idx.v:19: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsdownsel_real_idx.v:19: : This width expression violates that rule: ridx
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./ivltests/ipsdownsel_real_idx.v:20: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsdownsel_real_idx.v:20: : This width expression violates that rule: 0.500000
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./ivltests/ipsdownsel_real_idx.v:26: error: Indexed part select base expression for in[+ridx-:1] cannot be a real value.
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./ivltests/ipsdownsel_real_idx.v:27: error: Indexed part select base expression for in[0.500000-:1] cannot be a real value.
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./ivltests/ipsdownsel_real_idx.v:28: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsdownsel_real_idx.v:28: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsdownsel_real_idx.v:28: : This width expression violates that rule: ridx
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./ivltests/ipsdownsel_real_idx.v:29: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsdownsel_real_idx.v:29: : This width expression violates that rule: 0.500000
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./ivltests/ipsdownsel_real_idx.v:30: error: Indexed part select base expression for vlvb[+ridx-:1] cannot be a real value.
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./ivltests/ipsdownsel_real_idx.v:31: error: Indexed part select base expression for vlcb[0.500000-:1] cannot be a real value.
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./ivltests/ipsdownsel_real_idx.v:32: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsdownsel_real_idx.v:32: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsdownsel_real_idx.v:32: : This width expression violates that rule: ridx
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./ivltests/ipsdownsel_real_idx.v:33: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsdownsel_real_idx.v:33: : This width expression violates that rule: 0.500000
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./ivltests/ipsdownsel_real_idx.v:34: error: Indexed part select base expression for pval[+ridx-:1] cannot be a real value.
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./ivltests/ipsdownsel_real_idx.v:35: error: Indexed part select base expression for pval[0.500000-:1] cannot be a real value.
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./ivltests/ipsdownsel_real_idx.v:36: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsdownsel_real_idx.v:36: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsdownsel_real_idx.v:36: : This width expression violates that rule: ridx
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./ivltests/ipsdownsel_real_idx.v:37: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsdownsel_real_idx.v:37: : This width expression violates that rule: 0.500000
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./ivltests/ipsdownsel_real_idx.v:38: error: Cannot take the index part select of a string ('sval').
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./ivltests/ipsdownsel_real_idx.v:39: error: Cannot take the index part select of a string ('sval').
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./ivltests/ipsdownsel_real_idx.v:40: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsdownsel_real_idx.v:40: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsdownsel_real_idx.v:40: : This width expression violates that rule: ridx
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./ivltests/ipsdownsel_real_idx.v:40: error: Cannot take the index part select of a string ('sval').
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./ivltests/ipsdownsel_real_idx.v:41: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsdownsel_real_idx.v:41: : This width expression violates that rule: 0.500000
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./ivltests/ipsdownsel_real_idx.v:41: error: Cannot take the index part select of a string ('sval').
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./ivltests/ipsdownsel_real_idx.v:42: error: Cannot index part select assign to a string ('strvb').
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./ivltests/ipsdownsel_real_idx.v:43: error: Cannot index part select assign to a string ('strcb').
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./ivltests/ipsdownsel_real_idx.v:44: error: Cannot index part select assign to a string ('strvw').
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./ivltests/ipsdownsel_real_idx.v:45: error: Cannot index part select assign to a string ('strcw').
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39 error(s) during elaboration.
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@ -0,0 +1,54 @@
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./ivltests/ipsupsel_real_idx.v:13: error: Indexed part select base expression for in[+ridx+:1] cannot be a real value.
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./ivltests/ipsupsel_real_idx.v:13: error: Unable to elaborate r-value: in[ridx+:'sd1]
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./ivltests/ipsupsel_real_idx.v:14: error: Indexed part select base expression for in[0.500000+:1] cannot be a real value.
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./ivltests/ipsupsel_real_idx.v:14: error: Unable to elaborate r-value: in[0.500000+:'sd1]
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./ivltests/ipsupsel_real_idx.v:15: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsupsel_real_idx.v:15: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsupsel_real_idx.v:15: : This width expression violates that rule: ridx
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./ivltests/ipsupsel_real_idx.v:16: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsupsel_real_idx.v:16: : This width expression violates that rule: 0.500000
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./ivltests/ipsupsel_real_idx.v:17: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsupsel_real_idx.v:17: error: Indexed part select base expression must be a constant integral value in this context.
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./ivltests/ipsupsel_real_idx.v:17: : This expression violates that rule: ridx
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./ivltests/ipsupsel_real_idx.v:18: error: Indexed part select base expression must be a constant integral value in this context.
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./ivltests/ipsupsel_real_idx.v:18: : This expression violates that rule: 0.500000
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./ivltests/ipsupsel_real_idx.v:19: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsupsel_real_idx.v:19: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsupsel_real_idx.v:19: : This width expression violates that rule: ridx
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./ivltests/ipsupsel_real_idx.v:20: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsupsel_real_idx.v:20: : This width expression violates that rule: 0.500000
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./ivltests/ipsupsel_real_idx.v:26: error: Indexed part select base expression for in[+ridx+:1] cannot be a real value.
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./ivltests/ipsupsel_real_idx.v:27: error: Indexed part select base expression for in[0.500000+:1] cannot be a real value.
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./ivltests/ipsupsel_real_idx.v:28: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsupsel_real_idx.v:28: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsupsel_real_idx.v:28: : This width expression violates that rule: ridx
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./ivltests/ipsupsel_real_idx.v:29: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsupsel_real_idx.v:29: : This width expression violates that rule: 0.500000
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./ivltests/ipsupsel_real_idx.v:30: error: Indexed part select base expression for vlvb[+ridx+:1] cannot be a real value.
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./ivltests/ipsupsel_real_idx.v:31: error: Indexed part select base expression for vlcb[0.500000+:1] cannot be a real value.
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./ivltests/ipsupsel_real_idx.v:32: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsupsel_real_idx.v:32: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsupsel_real_idx.v:32: : This width expression violates that rule: ridx
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./ivltests/ipsupsel_real_idx.v:33: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsupsel_real_idx.v:33: : This width expression violates that rule: 0.500000
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./ivltests/ipsupsel_real_idx.v:34: error: Indexed part select base expression for pval[+ridx+:1] cannot be a real value.
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./ivltests/ipsupsel_real_idx.v:35: error: Indexed part select base expression for pval[0.500000+:1] cannot be a real value.
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./ivltests/ipsupsel_real_idx.v:36: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsupsel_real_idx.v:36: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsupsel_real_idx.v:36: : This width expression violates that rule: ridx
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./ivltests/ipsupsel_real_idx.v:37: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsupsel_real_idx.v:37: : This width expression violates that rule: 0.500000
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./ivltests/ipsupsel_real_idx.v:38: error: Cannot take the index part select of a string ('sval').
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./ivltests/ipsupsel_real_idx.v:39: error: Cannot take the index part select of a string ('sval').
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./ivltests/ipsupsel_real_idx.v:40: error: A reference to a net or variable (`ridx') is not allowed in a constant expression.
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./ivltests/ipsupsel_real_idx.v:40: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsupsel_real_idx.v:40: : This width expression violates that rule: ridx
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./ivltests/ipsupsel_real_idx.v:40: error: Cannot take the index part select of a string ('sval').
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./ivltests/ipsupsel_real_idx.v:41: error: Indexed part select width must be an integral constants greater than zero.
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./ivltests/ipsupsel_real_idx.v:41: : This width expression violates that rule: 0.500000
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./ivltests/ipsupsel_real_idx.v:41: error: Cannot take the index part select of a string ('sval').
|
||||
./ivltests/ipsupsel_real_idx.v:42: error: Cannot index part select assign to a string ('strvb').
|
||||
./ivltests/ipsupsel_real_idx.v:43: error: Cannot index part select assign to a string ('strcb').
|
||||
./ivltests/ipsupsel_real_idx.v:44: error: Cannot index part select assign to a string ('strvw').
|
||||
./ivltests/ipsupsel_real_idx.v:45: error: Cannot index part select assign to a string ('strcw').
|
||||
39 error(s) during elaboration.
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
module top;
|
||||
parameter pval = 7;
|
||||
string sval, strvb, strcb, strvw, strcw;
|
||||
real ridx;
|
||||
integer in;
|
||||
reg cavb, cacb, cavw, cacw;
|
||||
reg vvb, vcb, vvw, vcw;
|
||||
reg pvb, pcb, pvw, pcw;
|
||||
reg svb, scb, svw, scw;
|
||||
integer calvb, calcb, calvw, calcw;
|
||||
integer vlvb, vlcb, vlvw, vlcw;
|
||||
|
||||
assign cavb = in[ridx-:1];
|
||||
assign cacb = in[0.5-:1];
|
||||
assign cavw = in[1-:ridx];
|
||||
assign cacw = in[1-:0.5];
|
||||
assign calvb[ridx-:1] = 1'b1;
|
||||
assign calcb[0.5-:1] = 1'b1;
|
||||
assign calvw[1-:ridx] = 1'b1;
|
||||
assign calcw[1-:0.5] = 1'b1;
|
||||
|
||||
initial begin
|
||||
in = 7;
|
||||
ridx = 0.5;
|
||||
sval = "ABC";
|
||||
vvb = in[ridx-:1];
|
||||
vcb = in[0.5-:1];
|
||||
vvw = in[1-:ridx];
|
||||
vcw = in[1-:0.5];
|
||||
vlvb[ridx-:1] = 1'b1;
|
||||
vlcb[0.5-:1] = 1'b1;
|
||||
vlvw[1-:ridx] = 1'b1;
|
||||
vlcw[1-:0.5] = 1'b1;
|
||||
pvb = pval[ridx-:1];
|
||||
pcb = pval[0.5-:1];
|
||||
pvw = pval[1-:ridx];
|
||||
pcw = pval[1-:0.5];
|
||||
svb = sval[ridx-:1];
|
||||
scb = sval[0.5-:1];
|
||||
svw = sval[1-:ridx];
|
||||
scw = sval[1-:0.5];
|
||||
strvb[ridx-:1] = "a";
|
||||
strcb[0.5-:1] = "a";
|
||||
strvw[1-:ridx] = "a";
|
||||
strcw[1-:0.5] = "a";
|
||||
end
|
||||
endmodule
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
module top;
|
||||
parameter pval = 7;
|
||||
string sval, strvb, strcb, strvw, strcw;
|
||||
real ridx;
|
||||
integer in;
|
||||
reg cavb, cacb, cavw, cacw;
|
||||
reg vvb, vcb, vvw, vcw;
|
||||
reg pvb, pcb, pvw, pcw;
|
||||
reg svb, scb, svw, scw;
|
||||
integer calvb, calcb, calvw, calcw;
|
||||
integer vlvb, vlcb, vlvw, vlcw;
|
||||
|
||||
assign cavb = in[ridx+:1];
|
||||
assign cacb = in[0.5+:1];
|
||||
assign cavw = in[1+:ridx];
|
||||
assign cacw = in[1+:0.5];
|
||||
assign calvb[ridx+:1] = 1'b1;
|
||||
assign calcb[0.5+:1] = 1'b1;
|
||||
assign calvw[1+:ridx] = 1'b1;
|
||||
assign calcw[1+:0.5] = 1'b1;
|
||||
|
||||
initial begin
|
||||
in = 7;
|
||||
ridx = 0.5;
|
||||
sval = "ABC";
|
||||
vvb = in[ridx+:1];
|
||||
vcb = in[0.5+:1];
|
||||
vvw = in[1+:ridx];
|
||||
vcw = in[1+:0.5];
|
||||
vlvb[ridx+:1] = 1'b1;
|
||||
vlcb[0.5+:1] = 1'b1;
|
||||
vlvw[1+:ridx] = 1'b1;
|
||||
vlcw[1+:0.5] = 1'b1;
|
||||
pvb = pval[ridx+:1];
|
||||
pcb = pval[0.5+:1];
|
||||
pvw = pval[1+:ridx];
|
||||
pcw = pval[1+:0.5];
|
||||
svb = sval[ridx+:1];
|
||||
scb = sval[0.5+:1];
|
||||
svw = sval[1+:ridx];
|
||||
scw = sval[1+:0.5];
|
||||
strvb[ridx+:1] = "a";
|
||||
strcb[0.5+:1] = "a";
|
||||
strvw[1+:ridx] = "a";
|
||||
strcw[1+:0.5] = "a";
|
||||
end
|
||||
endmodule
|
||||
|
|
@ -996,4 +996,6 @@ br_gh840a CE,-g2012 ivltests
|
|||
br_gh840b CE,-g2012 ivltests
|
||||
bitsel_real_idx CE,-g2012 ivltests gold=bitsel_real_idx.gold
|
||||
partsel_real_idx CE,-g2012 ivltests gold=partsel_real_idx.gold
|
||||
ipsdownsel_real_idx CE,-g2012 ivltests gold=ipsdownsel_real_idx.gold
|
||||
ipsupsel_real_idx CE,-g2012 ivltests gold=ipsupsel_real_idx.gold
|
||||
real_edges CE,-g2012 ivltests gold=real_edges.gold
|
||||
|
|
|
|||
Loading…
Reference in New Issue