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Don't delete L-value concat signals and give a better error message. 

This patch removes the code that was deleting the signals in an L-value
concat if the concatenation failed to elaborate. This is incorrect since
the signal could be used in another context that is processed later. The
error message when an output/inout port fails to elaborate was also
improved to give the expression that is connected to the port.
This commit is contained in:
Cary R 2011-02-24 20:58:15 -08:00 committed by Stephen Williams
parent 468fd3d683
commit fc3118bd7f
2 changed files with 6 additions and 9 deletions
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5
elab_net.cc
View File

@ -84,12 +84,7 @@ NetNet* PEConcat::elaborate_lnet_common_(Design*des, NetScope*scope,
} }
/* If any of the sub expressions failed to elaborate, then
delete all those that did and abort myself. */
if (errors) { if (errors) {
for (unsigned idx = 0 ; idx < nets.count() ; idx += 1) {
if (nets[idx]) delete nets[idx];
}
des->errors += errors; des->errors += errors;
return 0; return 0;
} }

10
elaborate.cc
View File

@ -1411,8 +1411,9 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
<< "Inout port expression must support " << "Inout port expression must support "
<< "continuous assignment." << endl; << "continuous assignment." << endl;
cerr << pins[idx]->get_fileline() << ": : " cerr << pins[idx]->get_fileline() << ": : "
<< "Port of " << rmod->mod_name() << "Port " << rmod->ports[idx]->name << " of "
<< " is " << rmod->ports[idx]->name << endl; << rmod->mod_name() << " is connected to "
<< *pins[idx] << endl;
des->errors += 1; des->errors += 1;
continue; continue;
} }
@ -1457,8 +1458,9 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
<< "Output port expression must support " << "Output port expression must support "
<< "continuous assignment." << endl; << "continuous assignment." << endl;
cerr << pins[idx]->get_fileline() << ": : " cerr << pins[idx]->get_fileline() << ": : "
<< "Port of " << rmod->mod_name() << "Port " << rmod->ports[idx]->name << " of "
<< " is " << rmod->ports[idx]->name << endl; << rmod->mod_name() << " is connected to "
<< *pins[idx] << endl;
des->errors += 1; des->errors += 1;
continue; continue;
} }