Add vec4 support for bitwise or/nor/nand/xor/xnor.
This commit is contained in:
Stephen Williams
parent
9fc3e84e93
commit
f89dbd48c8
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@ -81,6 +81,18 @@ static void draw_binary_vec4_bitwise(ivl_expr_t expr, int stuff_ok_flag)
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case '|':
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fprintf(vvp_out, " %%or;\n");
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break;
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case '^':
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fprintf(vvp_out, " %%xor;\n");
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break;
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case 'A': /* ~& */
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fprintf(vvp_out, " %%nand;\n");
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break;
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case 'O': /* ~| */
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fprintf(vvp_out, " %%nor;\n");
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break;
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case 'X': /* ~^ */
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fprintf(vvp_out, " %%xnor;\n");
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break;
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default:
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assert(0);
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break;
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@ -311,6 +323,10 @@ static void draw_binary_vec4(ivl_expr_t expr, int stuff_ok_flag)
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case '&':
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case '|':
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case '^':
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case 'A': /* NAND (~&) */
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case 'O': /* NOR (~|) */
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case 'X': /* exclusive nor (~^) */
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draw_binary_vec4_bitwise(expr, stuff_ok_flag);
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break;
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@ -210,12 +210,12 @@ static const struct opcode_table_s opcode_table[] = {
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{ "%mul", of_MUL, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%mul/wr", of_MUL_WR, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%muli", of_MULI, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%nand", of_NAND, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%nand", of_NAND, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%nand/r", of_NANDR, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%new/cobj", of_NEW_COBJ, 1, {OA_VPI_PTR,OA_NONE, OA_NONE} },
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{ "%new/darray",of_NEW_DARRAY,2, {OA_BIT1, OA_STRING,OA_NONE} },
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{ "%noop", of_NOOP, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%nor", of_NOR, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%nor", of_NOR, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%nor/r", of_NORR, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%null", of_NULL, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%or", of_OR, 0, {OA_NONE, OA_NONE, OA_NONE} },
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@ -277,9 +277,9 @@ static const struct opcode_table_s opcode_table[] = {
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{ "%test_nul", of_TEST_NUL, 1,{OA_FUNC_PTR,OA_NONE, OA_NONE} },
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{ "%wait", of_WAIT, 1, {OA_FUNC_PTR, OA_NONE, OA_NONE} },
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{ "%wait/fork",of_WAIT_FORK,0,{OA_NONE, OA_NONE, OA_NONE} },
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{ "%xnor", of_XNOR, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%xnor", of_XNOR, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%xnor/r", of_XNORR, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%xor", of_XOR, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%xor", of_XOR, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%xor/r", of_XORR, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ 0, of_NOOP, 0, {OA_NONE, OA_NONE, OA_NONE} }
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};
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@ -877,11 +877,10 @@ This instruction is the same as %mul, but the second operand is an
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immediate value that is padded to the width of the result.
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* %nand <dst>, <src>, <wid>
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* %nand
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Perform the bitwise NAND of the two vectors, and store the result in
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the left vector. Each bit is calculated independent of other bits. NAND
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means the following:
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Perform the bitwise NAND of two vec4 vectors, and push the result. Each
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bit is calculated independent of other bits. NAND means the following:
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0 and ? --> 1
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? and 0 --> 1
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@ -908,11 +907,11 @@ The supported types are:
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"r" - real
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"S" - SystemVerilog string
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* %nor <dst>, <src>, <wid>
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* %nor
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Perform the bitwise nor of the vectors. Each bit in the <dst> is
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combined with the corresponding bit in the source, according to the
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truth table:
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Perform the bitwise nor of vec4 vectors, and push the result. Eack bit
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in the source vectors is combined to make a result bit according to the
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truth table.
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1 nor ? --> 0
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? nor 1 --> 0
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@ -1351,10 +1350,11 @@ This instruction puts the current thread to sleep until all the detached
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children have finished executing. The last detached child is responsible
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for restarting the parent when it finishes.
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* %xnor <dst>, <src>, <wid>
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* %xnor
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This does a bitwise exclusive nor (~^) of the <src> and <dst> vector,
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and leaves the result in the <dst> vector. xnor is this:
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This instruction pops two vectors from the vec4 stack, does a bitwise
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exclusive nor (~^) of the vectors, and pushes the result. The truth
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table for the xor is:
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0 xnor 0 --> 1
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0 xnor 1 --> 0
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@ -1363,16 +1363,17 @@ and leaves the result in the <dst> vector. xnor is this:
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otherwise x
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* %xor <dst>, <src>, <wid>
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* %xor
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This does a bitwise exclusive or (^) of the <src> and <dst> vector,
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and leaves the result in the <dst> vector. xor is this:
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This instruction pops two vectors from the vec4 stack, does a bitwise
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exclusive or (^) of the vectors, and pushes the result. The truth
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table for the xor is:
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0 xor 0 --> 0
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0 xor 1 --> 1
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1 xor 0 --> 1
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1 xor 1 --> 0
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otherwise x
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otherwise x
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/*
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187
vvp/vthread.cc
187
vvp/vthread.cc
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@ -4628,54 +4628,23 @@ bool of_MULI(vthread_t thr, vvp_code_t cp)
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#endif
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return true;
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}
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#if 0
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static bool of_NAND_wide(vthread_t thr, vvp_code_t cp)
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bool of_NAND(vthread_t thr, vvp_code_t)
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{
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unsigned idx1 = cp->bit_idx[0];
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unsigned idx2 = cp->bit_idx[1];
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unsigned wid = cp->number;
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vvp_vector4_t val = vthread_bits_to_vector(thr, idx1, wid);
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val &= vthread_bits_to_vector(thr, idx2, wid);
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thr->bits4.set_vec(idx1, ~val);
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return true;
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}
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static bool of_NAND_narrow(vthread_t thr, vvp_code_t cp)
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{
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unsigned idx1 = cp->bit_idx[0];
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unsigned idx2 = cp->bit_idx[1];
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unsigned wid = cp->number;
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vvp_vector4_t valr = thr->pop_vec4();
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vvp_vector4_t vall = thr->pop_vec4();
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assert(vall.size() == valr.size());
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unsigned wid = vall.size();
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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vvp_bit4_t lb = thr_get_bit(thr, idx1);
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vvp_bit4_t rb = thr_get_bit(thr, idx2);
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thr_put_bit(thr, idx1, ~(lb&rb));
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idx1 += 1;
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if (idx2 >= 4)
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idx2 += 1;
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vvp_bit4_t lb = vall.value(idx);
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vvp_bit4_t rb = valr.value(idx);
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vall.set_bit(idx, ~(lb&rb));
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}
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thr->push_vec4(vall);
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return true;
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}
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#endif
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bool of_NAND(vthread_t thr, vvp_code_t cp)
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{
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#if 0
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assert(cp->bit_idx[0] >= 4);
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if (cp->number <= 4)
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cp->opcode = &of_NAND_narrow;
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else
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cp->opcode = &of_NAND_wide;
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return cp->opcode(thr, cp);
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#else
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fprintf(stderr, "XXXX NOT IMPLEMENTED: %%nand ...\n");
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return true;
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#endif
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}
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/*
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* %new/cobj <vpi_object>
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@ -4913,53 +4882,24 @@ bool of_OR(vthread_t thr, vvp_code_t)
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return true;
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}
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#if 0
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static bool of_NOR_wide(vthread_t thr, vvp_code_t cp)
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{
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assert(cp->bit_idx[0] >= 4);
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unsigned idx1 = cp->bit_idx[0];
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unsigned idx2 = cp->bit_idx[1];
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unsigned wid = cp->number;
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vvp_vector4_t val = vthread_bits_to_vector(thr, idx1, wid);
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val |= vthread_bits_to_vector(thr, idx2, wid);
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thr->bits4.set_vec(idx1, ~val);
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return true;
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}
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static bool of_NOR_narrow(vthread_t thr, vvp_code_t cp)
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{
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unsigned idx1 = cp->bit_idx[0];
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unsigned idx2 = cp->bit_idx[1];
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unsigned wid = cp->number;
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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vvp_bit4_t lb = thr_get_bit(thr, idx1);
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vvp_bit4_t rb = thr_get_bit(thr, idx2);
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thr_put_bit(thr, idx1, ~(lb|rb));
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idx1 += 1;
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if (idx2 >= 4)
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idx2 += 1;
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}
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return true;
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}
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#endif
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/*
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* %nor
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*/
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bool of_NOR(vthread_t thr, vvp_code_t cp)
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{
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#if 0
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if (cp->number <= 4)
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cp->opcode = &of_NOR_narrow;
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else
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cp->opcode = &of_NOR_wide;
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vvp_vector4_t valr = thr->pop_vec4();
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vvp_vector4_t vall = thr->pop_vec4();
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assert(vall.size() == valr.size());
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unsigned wid = vall.size();
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return cp->opcode(thr, cp);
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#else
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fprintf(stderr, "XXXX NOT IMPLEMENTED: %%nor ...\n");
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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vvp_bit4_t lb = vall.value(idx);
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vvp_bit4_t rb = valr.value(idx);
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vall.set_bit(idx, ~(lb|rb));
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}
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thr->push_vec4(vall);
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return true;
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#endif
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}
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/*
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@ -6373,68 +6313,45 @@ bool of_WAIT_FORK(vthread_t thr, vvp_code_t)
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return false;
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}
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bool of_XNOR(vthread_t thr, vvp_code_t cp)
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/*
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* %xnor
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*/
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bool of_XNOR(vthread_t thr, vvp_code_t)
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{
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#if 0
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assert(cp->bit_idx[0] >= 4);
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vvp_vector4_t valr = thr->pop_vec4();
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vvp_vector4_t vall = thr->pop_vec4();
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assert(vall.size() == valr.size());
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unsigned wid = vall.size();
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unsigned idx1 = cp->bit_idx[0];
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unsigned idx2 = cp->bit_idx[1];
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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for (unsigned idx = 0 ; idx < cp->number ; idx += 1) {
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vvp_bit4_t lb = thr_get_bit(thr, idx1);
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vvp_bit4_t rb = thr_get_bit(thr, idx2);
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thr_put_bit(thr, idx1, ~(lb ^ rb));
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idx1 += 1;
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if (idx2 >= 4)
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idx2 += 1;
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vvp_bit4_t lb = vall.value(idx);
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vvp_bit4_t rb = valr.value(idx);
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vall.set_bit(idx, ~(lb ^ rb));
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}
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#else
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fprintf(stderr, "XXXX NOT IMPLEMENTED: %%xnor ...\n");
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#endif
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thr->push_vec4(vall);
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return true;
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}
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bool of_XOR(vthread_t thr, vvp_code_t cp)
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/*
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* %xor
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*/
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bool of_XOR(vthread_t thr, vvp_code_t)
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{
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#if 0
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assert(cp->bit_idx[0] >= 4);
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vvp_vector4_t valr = thr->pop_vec4();
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vvp_vector4_t vall = thr->pop_vec4();
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assert(vall.size() == valr.size());
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unsigned wid = vall.size();
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unsigned idx1 = cp->bit_idx[0];
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unsigned idx2 = cp->bit_idx[1];
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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for (unsigned idx = 0 ; idx < cp->number ; idx += 1) {
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vvp_bit4_t lb = thr_get_bit(thr, idx1);
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vvp_bit4_t rb = thr_get_bit(thr, idx2);
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if ((lb == BIT4_1) && (rb == BIT4_1)) {
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thr_put_bit(thr, idx1, BIT4_0);
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} else if ((lb == BIT4_0) && (rb == BIT4_0)) {
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thr_put_bit(thr, idx1, BIT4_0);
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} else if ((lb == BIT4_1) && (rb == BIT4_0)) {
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thr_put_bit(thr, idx1, BIT4_1);
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} else if ((lb == BIT4_0) && (rb == BIT4_1)) {
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thr_put_bit(thr, idx1, BIT4_1);
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} else {
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thr_put_bit(thr, idx1, BIT4_X);
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}
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idx1 += 1;
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if (idx2 >= 4)
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idx2 += 1;
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vvp_bit4_t lb = vall.value(idx);
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vvp_bit4_t rb = valr.value(idx);
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vall.set_bit(idx, lb ^ rb);
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}
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#else
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fprintf(stderr, "XXXX NOT IMPLEMENTED: %%xor ...\n");
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#endif
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thr->push_vec4(vall);
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return true;
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}
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