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Fix some bugs with blocking assignment

This commit is contained in:
Nick Gasson 2008-06-23 13:36:28 +01:00
parent e5ef0d97bd
commit f81129aa68
2 changed files with 20 additions and 2 deletions
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7
tgt-vhdl/process.cc
View File

@ -123,7 +123,11 @@ void draw_blocking_assigns(vhdl_process *proc, stmt_container *container)
rename_signal((*it).second, stripped);
}
g_assign_vars.clear();
// If this this wait is within e.g. an `if' statement then
// we cannot correctly clear the variables list here (since
// they might not be assigned on another path)
if (container == proc->get_container())
g_assign_vars.clear();
}
/*
@ -163,6 +167,7 @@ static int generate_vhdl_process(vhdl_entity *ent, ivl_process_t proc)
// Output any remaning blocking assignments
draw_blocking_assigns(vhdl_proc, vhdl_proc->get_container());
g_assign_vars.clear();
// Initial processes are translated to VHDL processes with
// no sensitivity list and and indefinite wait statement at

15
tgt-vhdl/stmt.cc
View File

@ -172,7 +172,7 @@ static int draw_assign(vhdl_process *proc, stmt_container *container,
ivl_lval_t lval = ivl_stmt_lval(stmt, 0);
ivl_signal_t sig;
if ((sig = ivl_lval_sig(lval))) {
const std::string &signame = get_renamed_signal(sig);
const std::string signame(get_renamed_signal(sig));
vhdl_decl *decl = proc->get_decl(signame);
assert(decl);
@ -187,6 +187,19 @@ static int draw_assign(vhdl_process *proc, stmt_container *container,
if (proc->is_initial() && ivl_signal_port(sig) == IVL_SIP_NONE
&& rhs->constant()) {
decl->set_initial(rhs);
// This signal may be used e.g. in a loop test so we need
// to make a variable as well
blocking_assign_to(proc, sig);
// The signal may have been renamed by the above call
const std::string &renamed = get_renamed_signal(sig);
vhdl_var_ref *lval_ref = new vhdl_var_ref(renamed.c_str(), NULL);
vhdl_var_ref *sig_ref = new vhdl_var_ref(signame.c_str(), NULL);
vhdl_assign_stmt *assign = new vhdl_assign_stmt(lval_ref, sig_ref);
container->add_stmt(assign);
}
else {
blocking_assign_to(proc, sig);