Consolidate net up/down part select
The methods for handling up and down part select are nearly identical and only differ in a hand full of lines. Consolidate them into a single method to remove the duplicated code. This makes it easier to maintain the code and add future changes. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
This commit is contained in:
Lars-Peter Clausen
parent
37dca4a016
commit
f77670a706
15
PExpr.h
15
PExpr.h
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@ -511,16 +511,11 @@ class PEIdent : public PExpr {
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NetESignal*net,
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NetScope*found,
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unsigned expr_wid) const;
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NetExpr*elaborate_expr_net_idx_up_(Design*des,
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NetScope*scope,
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NetESignal*net,
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NetScope*found,
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bool need_const) const;
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NetExpr*elaborate_expr_net_idx_do_(Design*des,
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NetScope*scope,
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NetESignal*net,
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NetScope*found,
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bool need_const) const;
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NetExpr*elaborate_expr_net_idx_up_do_(Design*des,
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NetScope*scope,
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NetESignal*net,
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NetScope*found,
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bool up, bool need_const) const;
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NetExpr*elaborate_expr_net_bit_(Design*des,
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NetScope*scope,
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NetESignal*net,
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223
elab_expr.cc
223
elab_expr.cc
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@ -5721,12 +5721,12 @@ NetExpr* PEIdent::elaborate_expr_net_word_(Design*des, NetScope*scope,
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expr_wid);
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if (word_sel == index_component_t::SEL_IDX_UP)
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return elaborate_expr_net_idx_up_(des, scope, res, found_in,
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need_const);
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return elaborate_expr_net_idx_up_do_(des, scope, res, found_in,
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true, need_const);
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if (word_sel == index_component_t::SEL_IDX_DO)
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return elaborate_expr_net_idx_do_(des, scope, res, found_in,
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need_const);
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return elaborate_expr_net_idx_up_do_(des, scope, res, found_in,
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false, need_const);
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if (word_sel == index_component_t::SEL_BIT)
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return elaborate_expr_net_bit_(des, scope, res, found_in,
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@ -5880,10 +5880,11 @@ NetExpr* PEIdent::elaborate_expr_net_part_(Design*des, NetScope*scope,
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}
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/*
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* Part select indexed up, i.e. net[<m> +: <l>]
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* Part select indexed up or down, i.e. net[<m> +: <l>]
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*/
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NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
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NetExpr* PEIdent::elaborate_expr_net_idx_up_do_(Design*des, NetScope*scope,
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NetESignal*net, NetScope*,
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bool up,
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bool need_const) const
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{
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if (net->sig()->data_type() == IVL_VT_STRING) {
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@ -5902,13 +5903,15 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
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if (!base)
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return nullptr;
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// Use the part select width already calculated by test_width().
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unsigned long wid = min_width_;
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const char *op = up ? "+" : "-";
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if (base->expr_type() == IVL_VT_REAL) {
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cerr << get_fileline() << ": error: Indexed part select base "
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"expression for " << net->sig()->name() << "[" << *base
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<< "+:" << wid << "] cannot be a real value." << endl;
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<< op << ":" << wid << "] cannot be a real value." << endl;
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des->errors += 1;
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return 0;
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}
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@ -5919,13 +5922,13 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
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if (const NetEConst*base_c = dynamic_cast<NetEConst*> (base)) {
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NetExpr*ex;
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if (base_c->value().is_defined()) {
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long lsv = base_c->value().as_long();
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long msv = base_c->value().as_long();
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long rel_base = 0;
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// Check whether an unsigned base fits in a 32 bit int.
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// This ensures correct results for the vlog95 target, and
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// for the vvp target on LLP64 platforms (Microsoft Windows).
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if (!base_c->has_sign() && (int32_t)lsv < 0) {
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if (!base_c->has_sign() && (int32_t)msv < 0) {
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// Return 'bx for a wrapped around base.
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ex = new NetEConst(verinum(verinum::Vx, wid, true));
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ex->set_line(*this);
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@ -5933,7 +5936,7 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
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if (warn_ob_select) {
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cerr << get_fileline() << ": warning: " << net->name();
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if (net->word_index()) cerr << "[]";
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cerr << "[" << (unsigned long)lsv << "+:" << wid
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cerr << "[" << (unsigned long)msv << op << ":" << wid
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<< "] is always outside vector." << endl;
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}
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return ex;
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@ -5949,12 +5952,17 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
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ivl_assert(*this, swid > 0);
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long loff, moff;
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unsigned long lwid, mwid;
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long lsv = msv;
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if (up)
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lsv += (wid/swid)-1;
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else
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lsv -= (wid/swid)-1;
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bool lrc, mrc;
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mrc = net->sig()->sb_to_slice(prefix_indices, lsv, moff, mwid);
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lrc = net->sig()->sb_to_slice(prefix_indices, lsv+(wid/swid)-1, loff, lwid);
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mrc = net->sig()->sb_to_slice(prefix_indices, msv, moff, mwid);
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lrc = net->sig()->sb_to_slice(prefix_indices, lsv, loff, lwid);
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if (!mrc || !lrc) {
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cerr << get_fileline() << ": error: ";
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cerr << "Part-select [" << lsv << "+:" << (wid/swid);
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cerr << "Part-select [" << msv << op << ":" << (wid/swid);
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cerr << "] exceeds the declared bounds for ";
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cerr << net->sig()->name();
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if (net->sig()->unpacked_dimensions() > 0) cerr << "[]";
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@ -5974,10 +5982,10 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
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long offset = 0;
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// We want the last range, which is where we work.
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const netrange_t&rng = packed.back();
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if (rng.get_msb() < rng.get_lsb()) {
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if ((rng.get_msb() > rng.get_lsb()) ^ up) {
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offset = -wid + 1;
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}
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rel_base = net->sig()->sb_to_idx(prefix_indices, lsv) + offset;
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rel_base = net->sig()->sb_to_idx(prefix_indices, msv) + offset;
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}
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// If the part select covers exactly the entire
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@ -5988,7 +5996,6 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
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net->cast_signed(false);
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return net;
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}
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// Otherwise, make a part select that covers the right
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// range.
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ex = new NetEConst(verinum(rel_base));
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@ -5997,14 +6004,14 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
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cerr << get_fileline() << ": warning: "
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<< net->name();
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if (net->word_index()) cerr << "[]";
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cerr << "[" << lsv << "+:" << wid
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cerr << "[" << msv << op << ":" << wid
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<< "] is selecting before vector." << endl;
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}
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if (rel_base + wid > net->vector_width()) {
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cerr << get_fileline() << ": warning: "
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<< net->name();
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if (net->word_index()) cerr << "[]";
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cerr << "[" << lsv << "+:" << wid
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cerr << "[" << msv << op << ":" << wid
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<< "] is selecting after vector." << endl;
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}
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}
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@ -6016,7 +6023,7 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
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if (warn_ob_select) {
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cerr << get_fileline() << ": warning: " << net->name();
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if (net->word_index()) cerr << "[]";
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cerr << "['bx+:" << wid
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cerr << "['bx" << op << ":" << wid
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<< "] is always outside vector." << endl;
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}
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return ex;
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@ -6033,175 +6040,9 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
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// Convert the non-constant part select index expression into
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// an expression that returns a canonical base.
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base = normalize_variable_part_base(prefix_indices, base, net->sig(), wid, true);
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base = normalize_variable_part_base(prefix_indices, base, net->sig(), wid, up);
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NetESelect*ss = new NetESelect(net, base, wid, IVL_SEL_IDX_UP);
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ss->set_line(*this);
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if (debug_elaborate) {
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cerr << get_fileline() << ": debug: Elaborate part "
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<< "select base="<< *base << ", wid="<< wid << endl;
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}
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return ss;
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}
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/*
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* Part select indexed down, i.e. net[<m> -: <l>]
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*/
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NetExpr* PEIdent::elaborate_expr_net_idx_do_(Design*des, NetScope*scope,
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NetESignal*net, NetScope*,
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bool need_const) const
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{
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if (net->sig()->data_type() == IVL_VT_STRING) {
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cerr << get_fileline() << ": error: Cannot take the index part "
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"select of a string ('" << net->name() << "')." << endl;
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des->errors += 1;
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return 0;
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}
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list<long>prefix_indices;
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bool rc = calculate_packed_indices_(des, scope, net->sig(), prefix_indices);
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if (!rc)
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return 0;
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NetExpr*base = calculate_up_do_base_(des, scope, need_const);
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if (!base)
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return nullptr;
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// Use the part select width already calculated by test_width().
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unsigned long wid = min_width_;
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if (base->expr_type() == IVL_VT_REAL) {
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cerr << get_fileline() << ": error: Indexed part select base "
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"expression for " << net->sig()->name() << "[" << *base
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<< "-:" << wid << "] cannot be a real value." << endl;
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des->errors += 1;
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return 0;
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}
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// Handle the special case that the base is constant as
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// well. In this case it can be converted to a conventional
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// part select.
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if (const NetEConst*base_c = dynamic_cast<NetEConst*> (base)) {
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NetExpr*ex;
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if (base_c->value().is_defined()) {
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long lsv = base_c->value().as_long();
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long rel_base = 0;
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// Check whether an unsigned base fits in a 32 bit int.
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// This ensures correct results for the vlog95 target, and
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// for the vvp target on LLP64 platforms (Microsoft Windows).
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if (!base_c->has_sign() && (int32_t)lsv < 0) {
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// Return 'bx for a wrapped around base.
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ex = new NetEConst(verinum(verinum::Vx, wid, true));
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ex->set_line(*this);
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delete base;
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if (warn_ob_select) {
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cerr << get_fileline() << ": warning: " << net->name();
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if (net->word_index()) cerr << "[]";
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cerr << "[" << (unsigned long)lsv << "-:" << wid
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<< "] is always outside vector." << endl;
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}
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return ex;
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}
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// Get the signal range.
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const netranges_t&packed = net->sig()->packed_dims();
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if (prefix_indices.size()+1 < net->sig()->packed_dims().size()) {
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// Here we are selecting one or more sub-arrays.
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// Make this work by finding the indexed sub-arrays and
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// creating a generated slice that spans the whole range.
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unsigned long swid = net->sig()->slice_width(prefix_indices.size()+1);
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ivl_assert(*this, swid > 0);
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long loff, moff;
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unsigned long lwid, mwid;
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bool lrc, mrc;
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mrc = net->sig()->sb_to_slice(prefix_indices, lsv, moff, mwid);
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lrc = net->sig()->sb_to_slice(prefix_indices, lsv-(wid/swid)+1, loff, lwid);
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if (!mrc || !lrc) {
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cerr << get_fileline() << ": error: ";
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cerr << "Part-select [" << lsv << "-:" << (wid/swid);
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cerr << "] exceeds the declared bounds for ";
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cerr << net->sig()->name();
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if (net->sig()->unpacked_dimensions() > 0) cerr << "[]";
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cerr << "." << endl;
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des->errors += 1;
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return 0;
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}
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ivl_assert(*this, mwid == swid);
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ivl_assert(*this, lwid == swid);
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if (moff > loff) {
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rel_base = loff;
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} else {
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rel_base = moff;
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}
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} else {
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long offset = 0;
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// We want the last range, which is where we work.
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const netrange_t&rng = packed.back();
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if (rng.get_msb() > rng.get_lsb()) {
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offset = -wid + 1;
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}
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rel_base = net->sig()->sb_to_idx(prefix_indices, lsv) + offset;
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}
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// If the part select covers exactly the entire
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// vector, then do not bother with it. Return the
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// signal itself.
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if (rel_base == (long)(wid-1) && wid == net->vector_width()) {
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delete base;
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net->cast_signed(false);
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return net;
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}
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// Otherwise, make a part select that covers the right
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// range.
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ex = new NetEConst(verinum(rel_base));
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if (warn_ob_select) {
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if (rel_base < 0) {
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cerr << get_fileline() << ": warning: "
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<< net->name();
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if (net->word_index()) cerr << "[]";
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cerr << "[" << lsv << "-:" << wid
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<< "] is selecting before vector." << endl;
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}
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if (rel_base + wid > net->vector_width()) {
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cerr << get_fileline() << ": warning: "
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<< net->name();
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if (net->word_index()) cerr << "[]";
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cerr << "[" << lsv << "-:" << wid
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<< "] is selecting after vector." << endl;
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}
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}
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} else {
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// Return 'bx for an undefined base.
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ex = new NetEConst(verinum(verinum::Vx, wid, true));
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ex->set_line(*this);
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delete base;
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if (warn_ob_select) {
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cerr << get_fileline() << ": warning: " << net->name();
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if (net->word_index()) cerr << "[]";
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cerr << "['bx-:" << wid
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<< "] is always outside vector." << endl;
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}
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return ex;
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}
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NetESelect*ss = new NetESelect(net, ex, wid);
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ss->set_line(*this);
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delete base;
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return ss;
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}
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ivl_assert(*this, prefix_indices.size()+1 == net->sig()->packed_dims().size());
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// Convert the non-constant part select index expression into
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// an expression that returns a canonical base.
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base = normalize_variable_part_base(prefix_indices, base, net->sig(), wid, false);
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NetESelect*ss = new NetESelect(net, base, wid, IVL_SEL_IDX_DOWN);
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NetESelect*ss = new NetESelect(net, base, wid, up ? IVL_SEL_IDX_UP : IVL_SEL_IDX_DOWN);
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ss->set_line(*this);
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if (debug_elaborate) {
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@ -6520,12 +6361,12 @@ NetExpr* PEIdent::elaborate_expr_net(Design*des, NetScope*scope,
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expr_wid);
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if (use_sel == index_component_t::SEL_IDX_UP)
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return elaborate_expr_net_idx_up_(des, scope, node, found_in,
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need_const);
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return elaborate_expr_net_idx_up_do_(des, scope, node, found_in,
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true, need_const);
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if (use_sel == index_component_t::SEL_IDX_DO)
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return elaborate_expr_net_idx_do_(des, scope, node, found_in,
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need_const);
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return elaborate_expr_net_idx_up_do_(des, scope, node, found_in,
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false, need_const);
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if (use_sel == index_component_t::SEL_BIT)
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return elaborate_expr_net_bit_(des, scope, node, found_in,
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