Detect proper support for missing else_ without latches (synthesis)
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463407572f
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28
synth2.cc
28
synth2.cc
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@ -366,10 +366,17 @@ bool NetCondit::synth_async(Design*des, NetScope*scope,
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return false;
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}
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if (else_ == 0) {
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cerr << get_fileline() << ": warning: Asynchronous if statement"
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<< " is missing the else clause, and I" << endl;
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cerr << get_fileline() << ": : don't know how to check"
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<< " for latches yet." << endl;
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bool latch_flag = false;
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for (unsigned idx = 0 ; idx < nex_out.pin_count() ; idx += 1) {
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if (! accumulated_nex_out.pin(idx).is_linked())
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latch_flag = true;
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}
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if (latch_flag) {
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cerr << get_fileline() << ": error: Asynchronous if statement"
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<< " cannot synthesize missing \"else\""
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<< " without generating latches." << endl;
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return false;
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}
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}
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ivl_assert(*this, if_ != 0);
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@ -389,16 +396,17 @@ bool NetCondit::synth_async(Design*des, NetScope*scope,
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NetBus btmp(scope, nex_out.pin_count());
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NetBus bsig(scope, nex_out.pin_count());
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if (else_) {
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flag = else_->synth_async(des, scope, nex_map, bsig, btmp);
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if (!flag) {
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return false;
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}
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} else {
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if (else_==0) {
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for (unsigned idx = 0 ; idx < nex_out.pin_count() ; idx += 1) {
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connect(bsig.pin(idx), accumulated_nex_out.pin(idx));
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accumulated_nex_out.pin(idx).unlink();
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}
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} else {
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flag = else_->synth_async(des, scope, nex_map, bsig, btmp);
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if (!flag) {
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return false;
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}
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}
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ivl_assert(*this, nex_out.pin_count()==asig.pin_count());
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