Fix the trigger for user functions with no args
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c6fe0106cb
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@ -0,0 +1,73 @@
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module top;
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reg passed;
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wire wconst, wfconst, wfconstarg;
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wire wdconst = 1'b0;
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wire wdfconst = cfunc();
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wire wdfconstarg = func(1'b0);
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real rfconst;
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function automatic reg cfunc();
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cfunc = 1'b0;
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endfunction
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function automatic reg func(input reg val);
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func = val;
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endfunction
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function automatic real crfunc();
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crfunc = 2.0;
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endfunction
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assign wconst = 1'b1;
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assign wfconst = cfunc();
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assign wfconstarg = func(1'b1);
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assign rfconst = crfunc();
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initial begin
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passed = 1'b1;
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#1;
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if (wconst !== 1'b1) begin
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$display("Expected wire constant value to be 1'b1, actual is %b", wconst);
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passed = 1'b0;
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end
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if (wdconst !== 1'b0) begin
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$display("Expected wire decl constant value to be 1'b0, actual is %b", wdconst);
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passed = 1'b0;
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end
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if (wfconst !== 1'b0) begin
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$display("Expected wire constant function value to be 1'b0, actual is %b", wfconst);
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passed = 1'b0;
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end
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if (wdfconst !== 1'b0) begin
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$display("Expected wire decl constant function value to be 1'b0, actual is %b", wdfconst);
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passed = 1'b0;
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end
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if (rfconst != 2.0) begin
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$display("Expected real constant function value to be 2.0, actual is %f", rfconst);
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passed = 1'b0;
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end
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if (wfconstarg !== 1'b1) begin
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$display("Expected wire constant arg function value to be 1'b1, actual is %b", wfconstarg);
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passed = 1'b0;
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end
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if (wdfconstarg !== 1'b0) begin
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$display("Expected wire decl constant arg function value to be 1'b0, actual is %b", wdfconstarg);
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passed = 1'b0;
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end
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if (cfunc() !== 1'b0) begin
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$display("Expected constant function value to be 1'b0, actual is %b", cfunc());
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passed = 1'b0;
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end
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if (passed) $display("PASSED");
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end
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endmodule
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@ -10,10 +10,10 @@ parameter test_parameter = test_func();
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logic [7:0] test_alwayscomb;
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logic [7:0] test_alwayscomb;
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always_comb test_alwayscomb = test_func();
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always_comb test_alwayscomb = test_func();
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// logic [7:0] test_assign;
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logic [7:0] test_assign;
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// assign test_assign = test_func();
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assign test_assign = test_func();
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// wire [7:0] test_wire = test_func();
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wire [7:0] test_wire = test_func();
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logic [7:0] test_alwaysff;
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logic [7:0] test_alwaysff;
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logic clk;
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logic clk;
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@ -37,15 +37,15 @@ initial begin
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$finish;
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$finish;
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end
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end
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// if (test_assign !== test_func()) begin
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if (test_assign !== test_func()) begin
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// $display("FAILED -- test_assign=%h, expect %h", test_assign, test_func());
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$display("FAILED -- test_assign=%h, expect %h", test_assign, test_func());
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// $finish;
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$finish;
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// end
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end
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// if (test_wire !== test_func()) begin
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if (test_wire !== test_func()) begin
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// $display("FAILED -- test_wire=%h, expect %h", test_wire, test_func());
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$display("FAILED -- test_wire=%h, expect %h", test_wire, test_func());
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// $finish;
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$finish;
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// end
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end
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clk = 0;
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clk = 0;
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#1;
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#1;
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@ -57,7 +57,7 @@ initial begin
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end
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end
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$display("PASSED");
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$display("PASSED");
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$finish;
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$finish(0);
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end
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end
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endmodule
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endmodule
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@ -994,6 +994,7 @@ br_gh823a CE,-g2012 ivltests
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br_gh823b CE,-g2012 ivltests
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br_gh823b CE,-g2012 ivltests
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br_gh840a CE,-g2012 ivltests
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br_gh840a CE,-g2012 ivltests
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br_gh840b CE,-g2012 ivltests
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br_gh840b CE,-g2012 ivltests
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br_gh979 normal,-g2012 ivltests
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bitsel_real_idx CE,-g2012 ivltests gold=bitsel_real_idx.gold
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bitsel_real_idx CE,-g2012 ivltests gold=bitsel_real_idx.gold
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partsel_real_idx CE,-g2012 ivltests gold=partsel_real_idx.gold
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partsel_real_idx CE,-g2012 ivltests gold=partsel_real_idx.gold
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ipsdownsel_real_idx CE,-g2012 ivltests gold=ipsdownsel_real_idx.gold
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ipsdownsel_real_idx CE,-g2012 ivltests gold=ipsdownsel_real_idx.gold
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2001-2022 Stephen Williams (steve@icarus.com)
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* Copyright (c) 2001-2023 Stephen Williams (steve@icarus.com)
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*
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*
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* This source code is free software; you can redistribute it
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* and/or modify it in source code form under the terms of the GNU
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@ -2072,22 +2072,20 @@ static void draw_lpm_ufunc(ivl_lpm_t net)
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for (idx = 0 ; idx < ninp ; idx += 1)
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for (idx = 0 ; idx < ninp ; idx += 1)
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input_strings[idx] = draw_net_input(ivl_lpm_data(net, idx));
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input_strings[idx] = draw_net_input(ivl_lpm_data(net, idx));
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if (ivl_lpm_trigger(net))
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if (ivl_lpm_trigger(net)) {
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fprintf(vvp_out, "L_%p%s .ufunc/e TD_%s, %u, E_%p", net, dly,
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assert(ninp > 0);
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vvp_mangle_id(ivl_scope_name(def)),
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fprintf(vvp_out, "L_%p%s .ufunc/e TD_%s, %u, E_%p", net, dly,
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ivl_lpm_width(net), ivl_lpm_trigger(net));
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vvp_mangle_id(ivl_scope_name(def)),
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else
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ivl_lpm_width(net), ivl_lpm_trigger(net));
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fprintf(vvp_out, "L_%p%s .ufunc%s TD_%s, %u", net, dly, type_string,
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} else
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vvp_mangle_id(ivl_scope_name(def)),
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fprintf(vvp_out, "L_%p%s .ufunc%s TD_%s, %u", net, dly, type_string,
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ivl_lpm_width(net));
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vvp_mangle_id(ivl_scope_name(def)),
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fprintf(vvp_out, ", ");
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ivl_lpm_width(net));
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/* Print all the net signals that connect to the input of the
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/* Print all the net signals that connect to the input of the
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function. */
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function. */
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for (idx = 0 ; idx < ninp ; idx += 1) {
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for (idx = 0 ; idx < ninp ; idx += 1) {
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fprintf(vvp_out, "%s", input_strings[idx]);
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fprintf(vvp_out, ", %s", input_strings[idx]);
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if (idx != ninp-1)
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fprintf(vvp_out, ", ");
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}
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}
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free(input_strings);
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free(input_strings);
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@ -2107,8 +2105,10 @@ static void draw_lpm_ufunc(ivl_lpm_t net)
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fprintf(vvp_out, "v%p_0", psig);
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fprintf(vvp_out, "v%p_0", psig);
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}
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}
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if (ninp > 0)
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if (ninp == 0)
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fprintf(vvp_out, ")");
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fprintf(vvp_out, ",");
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else
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fprintf(vvp_out, ")");
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#if 0
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#if 0
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/* Now print the reference to the signal from which the
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/* Now print the reference to the signal from which the
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result is collected. */
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result is collected. */
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15
vvp/parse.y
15
vvp/parse.y
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@ -1,7 +1,7 @@
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%{
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%{
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/*
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/*
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* Copyright (c) 2001-2022 Stephen Williams (steve@icarus.com)
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* Copyright (c) 2001-2023 Stephen Williams (steve@icarus.com)
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*
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*
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* This source code is free software; you can redistribute it
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* and/or modify it in source code form under the terms of the GNU
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@ -258,24 +258,19 @@ statement
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other thread code that is automatically invoked if any of the
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other thread code that is automatically invoked if any of the
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bits in the symbols list change. */
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bits in the symbols list change. */
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| T_LABEL K_UFUNC_REAL T_SYMBOL ',' T_NUMBER ',' T_SYMBOL ';'
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{ compile_ufunc_real($1, $3, $5, 0, 0, 0, 0, $7, strdup("E_0x0")); }
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| T_LABEL K_UFUNC_REAL T_SYMBOL ',' T_NUMBER ',' symbols '(' symbols ')' T_SYMBOL ';'
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| T_LABEL K_UFUNC_REAL T_SYMBOL ',' T_NUMBER ',' symbols '(' symbols ')' T_SYMBOL ';'
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{ compile_ufunc_real($1, $3, $5, $7.cnt, $7.vect, $9.cnt, $9.vect, $11, 0); }
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{ compile_ufunc_real($1, $3, $5, $7.cnt, $7.vect, $9.cnt, $9.vect, $11, 0); }
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| T_LABEL K_UFUNC_REAL T_SYMBOL ',' T_NUMBER ',' T_SYMBOL ';'
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| T_LABEL K_UFUNC_VEC4 T_SYMBOL ',' T_NUMBER ',' T_SYMBOL ';'
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{ compile_ufunc_real($1, $3, $5, 0, 0, 0, 0, $7, 0); }
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{ compile_ufunc_vec4($1, $3, $5, 0, 0, 0, 0, $7, strdup("E_0x0")); }
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| T_LABEL K_UFUNC_VEC4 T_SYMBOL ',' T_NUMBER ',' symbols '(' symbols ')' T_SYMBOL ';'
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| T_LABEL K_UFUNC_VEC4 T_SYMBOL ',' T_NUMBER ',' symbols '(' symbols ')' T_SYMBOL ';'
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{ compile_ufunc_vec4($1, $3, $5, $7.cnt, $7.vect, $9.cnt, $9.vect, $11, 0); }
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{ compile_ufunc_vec4($1, $3, $5, $7.cnt, $7.vect, $9.cnt, $9.vect, $11, 0); }
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| T_LABEL K_UFUNC_VEC4 T_SYMBOL ',' T_NUMBER ',' T_SYMBOL ';'
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{ compile_ufunc_vec4($1, $3, $5, 0, 0, 0, 0, $7, 0); }
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| T_LABEL K_UFUNC_E T_SYMBOL ',' T_NUMBER ',' T_SYMBOL ',' symbols '(' symbols ')' T_SYMBOL ';'
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| T_LABEL K_UFUNC_E T_SYMBOL ',' T_NUMBER ',' T_SYMBOL ',' symbols '(' symbols ')' T_SYMBOL ';'
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{ compile_ufunc_vec4($1, $3, $5, $9.cnt, $9.vect, $11.cnt, $11.vect, $13, $7); }
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{ compile_ufunc_vec4($1, $3, $5, $9.cnt, $9.vect, $11.cnt, $11.vect, $13, $7); }
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| T_LABEL K_UFUNC_E T_SYMBOL ',' T_NUMBER ',' T_SYMBOL ',' T_SYMBOL ';'
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{ compile_ufunc_vec4($1, $3, $5, 0, 0, 0, 0, $7, 0); }
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/* Resolver statements are very much like functors. They are
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/* Resolver statements are very much like functors. They are
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compiled to functors of a different mode. */
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compiled to functors of a different mode. */
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