synth2 NetForLoop synthesis works a lot like begin/end blocks.
Using the synth_async_block_substatement_ makes the for-loop synthesis properly handle the chance that there are default inputs.
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synth2.cc
10
synth2.cc
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@ -611,7 +611,11 @@ bool NetForLoop::synth_async(Design*des, NetScope*scope,
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// value and use it during its own synthesis.
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ivl_assert(*this, scope->loop_index_tmp.empty());
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scope->loop_index_tmp = index_args;
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rc = statement_->synth_async(des, scope, nex_map, nex_out, accumulated_nex_out);
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rc = synth_async_block_substatement_(des, scope, nex_map,
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accumulated_nex_out,
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statement_);
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scope->loop_index_tmp.clear();
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// Evaluate the step_expr to generate the next index value.
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@ -645,6 +649,10 @@ bool NetForLoop::synth_async(Design*des, NetScope*scope,
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delete index_var.value;
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// The output from the block is now the accumulated outputs.
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for (unsigned idx = 0 ; idx < nex_out.pin_count() ; idx += 1)
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connect(nex_out.pin(idx), accumulated_nex_out.pin(idx));
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return true;
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}
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