Avoid processing tgt-vhdl/Makefile.in twice

It's processed once by AC_OUTPUT in configure.in and then again
by AC_OUTPUT in tgt-vhdl/configure.in. This is a bug from when I
first started on the VHDL target, and was basing it on the tgt-vvp
code. The call to configure in the tgt-vhdl directory is not
actually necessary either, since it doesn't do any checks not
performed elsewhere, so that should proably be removed later.
This commit is contained in:
Nick Gasson 2008-09-13 16:48:08 +01:00 committed by Stephen Williams
parent 3d86cc1a15
commit eda1df5df2
1 changed files with 1 additions and 1 deletions

View File

@ -124,4 +124,4 @@ AX_CPP_IDENT
# XXX disable tgt-fpga for the moment
AC_CONFIG_SUBDIRS(vvp vpi tgt-stub tgt-null tgt-vvp tgt-vhdl libveriuser cadpli)
AC_OUTPUT(Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-verilog/Makefile tgt-pal/Makefile tgt-vhdl/Makefile)
AC_OUTPUT(Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-verilog/Makefile tgt-pal/Makefile)