Avoid processing tgt-vhdl/Makefile.in twice
It's processed once by AC_OUTPUT in configure.in and then again by AC_OUTPUT in tgt-vhdl/configure.in. This is a bug from when I first started on the VHDL target, and was basing it on the tgt-vvp code. The call to configure in the tgt-vhdl directory is not actually necessary either, since it doesn't do any checks not performed elsewhere, so that should proably be removed later.
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@ -124,4 +124,4 @@ AX_CPP_IDENT
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# XXX disable tgt-fpga for the moment
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AC_CONFIG_SUBDIRS(vvp vpi tgt-stub tgt-null tgt-vvp tgt-vhdl libveriuser cadpli)
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AC_OUTPUT(Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-verilog/Makefile tgt-pal/Makefile tgt-vhdl/Makefile)
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AC_OUTPUT(Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-verilog/Makefile tgt-pal/Makefile)
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