Implement arithmetic right shift >>>
This is currently implemented using the numeric_std shift_right function as the sra operator is not defined on signed/unsigned types before VHDL-2006.
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@ -241,7 +241,20 @@ static vhdl_expr *translate_shift(vhdl_expr *lhs, vhdl_expr *rhs,
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vhdl_expr *r_cast = rhs->cast(&integer);
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vhdl_expr *r_cast = rhs->cast(&integer);
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vhdl_type *rtype = new vhdl_type(*lhs->get_type());
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vhdl_type *rtype = new vhdl_type(*lhs->get_type());
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return new vhdl_binop_expr(lhs, op, r_cast, rtype);
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// The sra operator is not defined on numeric_std types until
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// VHDL-2006 which is not well supported. Instead we can use
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// the shift_right function which does the same thing and
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// exists in earlier versions of numeric_std.
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if (op == VHDL_BINOP_SRA) {
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vhdl_fcall *sra = new vhdl_fcall("shift_right", rtype);
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sra->add_expr(lhs);
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sra->add_expr(r_cast);
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return sra;
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}
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else
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return new vhdl_binop_expr(lhs, op, r_cast, rtype);
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}
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}
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/*
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/*
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@ -388,6 +401,15 @@ static vhdl_expr *translate_binary(ivl_expr_t e)
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case 'r':
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case 'r':
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result = translate_shift(lhs, rhs, VHDL_BINOP_SR);
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result = translate_shift(lhs, rhs, VHDL_BINOP_SR);
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break;
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break;
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case 'R': // Arithmetic right shift
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// Verilog only actually performs a signed shift if the
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// argument being shifted is signed, otherwise it defaults
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// to a normal shift
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if (ivl_expr_signed(ivl_expr_oper1(e)))
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result = translate_shift(lhs, rhs, VHDL_BINOP_SRA);
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else
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result = translate_shift(lhs, rhs, VHDL_BINOP_SR);
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break;
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case '^':
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case '^':
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result = translate_numeric(lhs, rhs, VHDL_BINOP_XOR);
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result = translate_numeric(lhs, rhs, VHDL_BINOP_XOR);
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break;
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break;
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@ -730,7 +730,7 @@ void vhdl_binop_expr::emit(std::ostream &of, int level) const
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const char* ops[] = {
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const char* ops[] = {
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"and", "or", "=", "/=", "+", "-", "*", "<",
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"and", "or", "=", "/=", "+", "-", "*", "<",
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">", "<=", ">=", "sll", "srl", "xor", "&",
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">", "<=", ">=", "sll", "srl", "xor", "&",
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"nand", "nor", "xnor", "/", "mod", "**", NULL
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"nand", "nor", "xnor", "/", "mod", "**", "sra", NULL
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};
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};
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of << " " << ops[op_] << " ";
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of << " " << ops[op_] << " ";
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@ -92,6 +92,7 @@ enum vhdl_binop_t {
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VHDL_BINOP_DIV,
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VHDL_BINOP_DIV,
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VHDL_BINOP_MOD,
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VHDL_BINOP_MOD,
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VHDL_BINOP_POWER,
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VHDL_BINOP_POWER,
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VHDL_BINOP_SRA,
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};
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};
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/*
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/*
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