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Fix for pr3465541. 

vvp_net_t::send_vec8_pv() needs to call the output filter if one is
present, and vvp_wire_vec4::filter_vec8() needs to support part selects.
This commit is contained in:
Martin Whitaker 2012-01-07 12:36:28 +00:00 committed by Stephen Williams
parent d5b5fbd274
commit e485ac9981
2 changed files with 37 additions and 8 deletions
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27
vvp/vvp_net.h
View File

@ -1546,10 +1546,9 @@ inline void vvp_send_vec4_pv(vvp_net_ptr_t ptr, const vvp_vector4_t&val,
}
}
inline void vvp_net_t::send_vec8_pv(const vvp_vector8_t&val,
unsigned base, unsigned wid, unsigned vwid)
inline void vvp_send_vec8_pv(vvp_net_ptr_t ptr, const vvp_vector8_t&val,
unsigned base, unsigned wid, unsigned vwid)
{
vvp_net_ptr_t ptr = out_;
while (class vvp_net_t*cur = ptr.ptr()) {
vvp_net_ptr_t next = cur->port[ptr.port()];
@ -1623,6 +1622,28 @@ inline void vvp_net_t::send_vec8(const vvp_vector8_t&val)
}
}
inline void vvp_net_t::send_vec8_pv(const vvp_vector8_t&val,
unsigned base, unsigned wid, unsigned vwid)
{
if (fil == 0) {
vvp_send_vec8_pv(out_, val, base, wid, vwid);
return;
}
assert(val.size() == wid);
vvp_vector8_t rep;
switch (fil->filter_vec8(val, rep, base, vwid)) {
case vvp_net_fil_t::STOP:
break;
case vvp_net_fil_t::PROP:
vvp_send_vec8_pv(out_, val, base, wid, vwid);
break;
case vvp_net_fil_t::REPL:
vvp_send_vec8_pv(out_, rep, base, wid, vwid);
break;
}
}
inline void vvp_net_t::send_real(double val, vvp_context_t context)
{
if (fil && ! fil->filter_real(val))

18
vvp/vvp_net_sig.cc
View File

@ -651,12 +651,20 @@ vvp_net_fil_t::prop_t vvp_wire_vec4::filter_vec8(const vvp_vector8_t&bit,
unsigned base,
unsigned vwid)
{
// For now there is no support for a non-zero base.
assert(0 == base);
assert(bits4_.size() == vwid);
assert(bits4_.size() == bit.size());
bits4_ = reduce4(bit);
return filter_mask_(bit, vvp_vector8_t(force4_,6,6), rep, 0);
// Keep track of the value being driven from this net, even if
// it is not ultimately what survives the force filter.
vvp_vector4_t bit4 (reduce4(bit));
if (base==0 && bit4.size()==vwid) {
if (bits4_ .eeq( bit4 ) && !needs_init_) return STOP;
bits4_ = bit4;
} else {
bits4_.set_vec(base, bit4);
}
needs_init_ = false;
return filter_mask_(bit, vvp_vector8_t(force4_,6,6), rep, base);
}
unsigned vvp_wire_vec4::filter_size() const