Improve identifier lexical position accuracy in declarations.

Enhance the lists of identifiers and declaration assignments generated
by the parser to associate each identifier with its lexical_pos. Also do
this for single items in complex parser rules where the location passed
to the pform is not the location of the identifier.
This commit is contained in:
Martin Whitaker 2024-02-18 22:34:48 +00:00
parent 4159a6a6b1
commit e22831553d
8 changed files with 121 additions and 123 deletions

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2012-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 2012-2024 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -250,7 +250,7 @@ ivl_type_t struct_type_t::elaborate_type_raw(Design*des, NetScope*scope) const
}
netstruct_t::member_t memb;
memb.name = namep->name;
memb.name = namep->name.first;
memb.net_type = elaborate_array_type(des, scope, *this,
mem_vec, namep->index);
res->append_member(des, memb);

92
parse.y
View File

@ -135,32 +135,39 @@ static std::list<named_pexpr_t>*attributes_in_context = 0;
static const struct str_pair_t pull_strength = { IVL_DR_PULL, IVL_DR_PULL };
static const struct str_pair_t str_strength = { IVL_DR_STRONG, IVL_DR_STRONG };
static std::list<pform_port_t>* make_port_list(char*id, std::list<pform_range_t>*udims, PExpr*expr)
static std::list<pform_port_t>* make_port_list(char*id, unsigned idn,
std::list<pform_range_t>*udims,
PExpr*expr)
{
std::list<pform_port_t>*tmp = new std::list<pform_port_t>;
tmp->push_back(pform_port_t(lex_strings.make(id), udims, expr));
pform_ident_t tmp_name = { lex_strings.make(id), idn };
tmp->push_back(pform_port_t(tmp_name, udims, expr));
delete[]id;
return tmp;
}
static std::list<pform_port_t>* make_port_list(list<pform_port_t>*tmp,
char*id, std::list<pform_range_t>*udims, PExpr*expr)
char*id, unsigned idn,
std::list<pform_range_t>*udims,
PExpr*expr)
{
tmp->push_back(pform_port_t(lex_strings.make(id), udims, expr));
pform_ident_t tmp_name = { lex_strings.make(id), idn };
tmp->push_back(pform_port_t(tmp_name, udims, expr));
delete[]id;
return tmp;
}
static std::list<perm_string>* list_from_identifier(char*id)
static std::list<pform_ident_t>* list_from_identifier(char*id, unsigned idn)
{
std::list<perm_string>*tmp = new std::list<perm_string>;
tmp->push_back(lex_strings.make(id));
std::list<pform_ident_t>*tmp = new std::list<pform_ident_t>;
tmp->push_back({ lex_strings.make(id), idn });
delete[]id;
return tmp;
}
static std::list<perm_string>* list_from_identifier(list<perm_string>*tmp, char*id)
static std::list<pform_ident_t>* list_from_identifier(list<pform_ident_t>*tmp,
char*id, unsigned idn)
{
tmp->push_back(lex_strings.make(id));
tmp->push_back({ lex_strings.make(id), idn });
delete[]id;
return tmp;
}
@ -376,10 +383,10 @@ Module::port_t *module_declare_port(const YYLTYPE&loc, char *id,
PExpr *default_value,
std::list<named_pexpr_t> *attributes)
{
perm_string name = lex_strings.make(id);
pform_ident_t name = { lex_strings.make(id), loc.lexical_pos };
delete[] id;
Module::port_t *port = pform_module_port_reference(loc, name);
Module::port_t *port = pform_module_port_reference(loc, name.first);
switch (port_type) {
case NetNet::PINOUT:
@ -442,6 +449,8 @@ Module::port_t *module_declare_port(const YYLTYPE&loc, char *id,
char*text;
std::list<perm_string>*perm_strings;
std::list<pform_ident_t>*identifiers;
std::list<pform_port_t>*port_list;
std::vector<pform_tf_port_t>* tf_ports;
@ -655,10 +664,10 @@ Module::port_t *module_declare_port(const YYLTYPE&loc, char *id,
%type <drive> drive_strength drive_strength_opt dr_strength0 dr_strength1
%type <letter> udp_input_sym udp_output_sym
%type <text> udp_input_list udp_sequ_entry udp_comb_entry
%type <perm_strings> udp_input_declaration_list
%type <identifiers> udp_input_declaration_list
%type <strings> udp_entry_list udp_comb_entry_list udp_sequ_entry_list
%type <strings> udp_body
%type <perm_strings> udp_port_list
%type <identifiers> udp_port_list
%type <wires> udp_port_decl udp_port_decls
%type <statement> udp_initial udp_init_opt
@ -668,8 +677,9 @@ Module::port_t *module_declare_port(const YYLTYPE&loc, char *id,
%type <text> event_variable label_opt class_declaration_endlabel_opt
%type <text> block_identifier_opt
%type <text> identifier_name
%type <perm_strings> event_variable_list
%type <perm_strings> list_of_identifiers loop_variables
%type <identifiers> event_variable_list
%type <identifiers> list_of_identifiers
%type <perm_strings> loop_variables
%type <port_list> list_of_port_identifiers list_of_variable_port_identifiers
%type <decl_assignments> net_decl_assigns
@ -1773,7 +1783,7 @@ loop_statement /* IEEE1800-2005: A.6.8 */
list<decl_assignment_t*>assign_list;
decl_assignment_t*tmp_assign = new decl_assignment_t;
tmp_assign->name = lex_strings.make($5);
tmp_assign->name = { lex_strings.make($5), @5.lexical_pos };
assign_list.push_back(tmp_assign);
pform_make_var(@5, &assign_list, $4);
}
@ -1916,7 +1926,7 @@ variable_decl_assignment /* IEEE1800-2005 A.2.3 */
}
decl_assignment_t*tmp = new decl_assignment_t;
tmp->name = lex_strings.make($1);
tmp->name = { lex_strings.make($1), @1.lexical_pos };
if ($2) {
tmp->index = *$2;
delete $2;
@ -2500,7 +2510,7 @@ tf_port_item /* IEEE1800-2005: A.2.7 */
NetNet::PortType use_port_type = $1;
if ((use_port_type == NetNet::PIMPLICIT) && (gn_system_verilog() || ($3 == 0)))
use_port_type = port_declaration_context.port_type;
list<pform_port_t>* port_list = make_port_list($4, $5, 0);
list<pform_port_t>* port_list = make_port_list($4, @4.lexical_pos, $5, 0);
if (use_port_type == NetNet::PIMPLICIT) {
yyerror(@1, "error: Missing task/function port direction.");
@ -4486,23 +4496,23 @@ hierarchy_identifier
non-hierarchical names separated by ',' characters. */
list_of_identifiers
: IDENTIFIER
{ $$ = list_from_identifier($1); }
{ $$ = list_from_identifier($1, @1.lexical_pos); }
| list_of_identifiers ',' IDENTIFIER
{ $$ = list_from_identifier($1, $3); }
{ $$ = list_from_identifier($1, $3, @3.lexical_pos); }
;
list_of_port_identifiers
: IDENTIFIER dimensions_opt
{ $$ = make_port_list($1, $2, 0); }
{ $$ = make_port_list($1, @1.lexical_pos, $2, 0); }
| list_of_port_identifiers ',' IDENTIFIER dimensions_opt
{ $$ = make_port_list($1, $3, $4, 0); }
{ $$ = make_port_list($1, $3, @3.lexical_pos, $4, 0); }
;
list_of_variable_port_identifiers
: IDENTIFIER dimensions_opt initializer_opt
{ $$ = make_port_list($1, $2, $3); }
{ $$ = make_port_list($1, @1.lexical_pos, $2, $3); }
| list_of_variable_port_identifiers ',' IDENTIFIER dimensions_opt initializer_opt
{ $$ = make_port_list($1, $3, $4, $5); }
{ $$ = make_port_list($1, $3, @3.lexical_pos, $4, $5); }
;
@ -5421,7 +5431,7 @@ generate_block
net_decl_assign
: IDENTIFIER '=' expression
{ decl_assignment_t*tmp = new decl_assignment_t;
tmp->name = lex_strings.make($1);
tmp->name = { lex_strings.make($1), @1.lexical_pos };
tmp->expr.reset($3);
delete[]$1;
$$ = tmp;
@ -5894,7 +5904,7 @@ dimensions
net_variable
: IDENTIFIER dimensions_opt
{ perm_string name = lex_strings.make($1);
{ pform_ident_t name = { lex_strings.make($1), @1.lexical_pos };
$$ = pform_makewire(@1, name, NetNet::IMPLICIT, $2);
delete [] $1;
}
@ -5924,9 +5934,9 @@ event_variable
event_variable_list
: event_variable
{ $$ = list_from_identifier($1); }
{ $$ = list_from_identifier($1, @1.lexical_pos); }
| event_variable_list ',' event_variable
{ $$ = list_from_identifier($1, $3); }
{ $$ = list_from_identifier($1, $3, @3.lexical_pos); }
;
specify_item
@ -7289,17 +7299,9 @@ udp_port_decls
udp_port_list
: IDENTIFIER
{ std::list<perm_string>*tmp = new std::list<perm_string>;
tmp->push_back(lex_strings.make($1));
delete[]$1;
$$ = tmp;
}
{ $$ = list_from_identifier($1, @1.lexical_pos); }
| udp_port_list ',' IDENTIFIER
{ std::list<perm_string>*tmp = $1;
tmp->push_back(lex_strings.make($3));
delete[]$3;
$$ = tmp;
}
{ $$ = list_from_identifier($1, $3, @3.lexical_pos); }
;
udp_reg_opt
@ -7308,17 +7310,9 @@ udp_reg_opt
udp_input_declaration_list
: K_input IDENTIFIER
{ std::list<perm_string>*tmp = new std::list<perm_string>;
tmp->push_back(lex_strings.make($2));
$$ = tmp;
delete[]$2;
}
{ $$ = list_from_identifier($2, @2.lexical_pos); }
| udp_input_declaration_list ',' K_input IDENTIFIER
{ std::list<perm_string>*tmp = $1;
tmp->push_back(lex_strings.make($4));
$$ = tmp;
delete[]$4;
}
{ $$ = list_from_identifier($1, $4, @4.lexical_pos); }
;
udp_primitive
@ -7346,7 +7340,7 @@ udp_primitive
udp_body
K_endprimitive label_opt
{ perm_string tmp2 = lex_strings.make($2);
perm_string tmp6 = lex_strings.make($6);
pform_ident_t tmp6 = { lex_strings.make($6) , @6.lexical_pos };
pform_make_udp(@2, tmp2, $5, tmp6, $7, $9, $12);
check_end_label(@14, "primitive", $2, $14);
delete[]$2;

View File

@ -969,7 +969,7 @@ void pform_make_foreach_declarations(const struct vlltype&loc,
if (cur->nil())
continue;
decl_assignment_t*tmp_assign = new decl_assignment_t;
tmp_assign->name = lex_strings.make(*cur);
tmp_assign->name = { lex_strings.make(*cur), 0 };
assign_list.push_back(tmp_assign);
}
@ -1478,19 +1478,19 @@ void pform_endmodule(const char*name, bool inside_celldefine,
pform_pop_scope();
}
void pform_genvars(const struct vlltype&li, list<perm_string>*names)
void pform_genvars(const struct vlltype&li, list<pform_ident_t>*names)
{
list<perm_string>::const_iterator cur;
list<pform_ident_t>::const_iterator cur;
for (cur = names->begin(); cur != names->end() ; *cur++) {
PGenvar*genvar = new PGenvar();
FILE_NAME(genvar, li);
if (pform_cur_generate) {
add_local_symbol(pform_cur_generate, *cur, genvar);
pform_cur_generate->genvars[*cur] = genvar;
add_local_symbol(pform_cur_generate, cur->first, genvar);
pform_cur_generate->genvars[cur->first] = genvar;
} else {
add_local_symbol(pform_cur_module.front(), *cur, genvar);
pform_cur_module.front()->genvars[*cur] = genvar;
add_local_symbol(pform_cur_module.front(), cur->first, genvar);
pform_cur_module.front()->genvars[cur->first] = genvar;
}
}
@ -1855,7 +1855,7 @@ static void process_udp_table(PUdp*udp, list<string>*table,
}
void pform_make_udp(const struct vlltype&loc, perm_string name,
list<perm_string>*parms, vector<PWire*>*decl,
list<pform_ident_t>*parms, vector<PWire*>*decl,
list<string>*table, Statement*init_expr)
{
unsigned local_errors = 0;
@ -1896,13 +1896,13 @@ void pform_make_udp(const struct vlltype&loc, perm_string name,
PWire* created by an input or output declaration. */
std::vector<PWire*> pins(parms->size());
std::vector<perm_string> pin_names(parms->size());
{ list<perm_string>::iterator cur;
{ list<pform_ident_t>::iterator cur;
unsigned idx;
for (cur = parms->begin(), idx = 0
; cur != parms->end()
; ++ idx, ++ cur) {
pins[idx] = defs[*cur];
pin_names[idx] = *cur;
pins[idx] = defs[cur->first];
pin_names[idx] = cur->first;
}
}
@ -2048,27 +2048,27 @@ void pform_make_udp(const struct vlltype&loc, perm_string name,
}
void pform_make_udp(const struct vlltype&loc, perm_string name,
bool synchronous_flag, perm_string out_name,
PExpr*init_expr, list<perm_string>*parms,
bool synchronous_flag, const pform_ident_t&out_name,
PExpr*init_expr, list<pform_ident_t>*parms,
list<string>*table)
{
std::vector<PWire*> pins(parms->size() + 1);
/* Make the PWire for the output port. */
pins[0] = new PWire(out_name, loc.lexical_pos,
pins[0] = new PWire(out_name.first, out_name.second,
synchronous_flag? NetNet::REG : NetNet::WIRE,
NetNet::POUTPUT);
FILE_NAME(pins[0], loc);
/* Make the PWire objects for the input ports. */
{ list<perm_string>::iterator cur;
{ list<pform_ident_t>::iterator cur;
unsigned idx;
for (cur = parms->begin(), idx = 1
; cur != parms->end()
; idx += 1, ++ cur) {
ivl_assert(loc, idx < pins.size());
pins[idx] = new PWire(*cur, loc.lexical_pos, NetNet::WIRE,
pins[idx] = new PWire(cur->first, cur->second, NetNet::WIRE,
NetNet::PINPUT);
FILE_NAME(pins[idx], loc);
}
@ -2151,21 +2151,19 @@ static void pform_set_net_range(PWire *wire,
* This is invoked to make a named event. This is the declaration of
* the event, and not necessarily the use of it.
*/
static void pform_make_event(const struct vlltype&loc, perm_string name)
static void pform_make_event(const struct vlltype&loc, const pform_ident_t&name)
{
PEvent*event = new PEvent(name, loc.lexical_pos);
PEvent*event = new PEvent(name.first, name.second);
FILE_NAME(event, loc);
add_local_symbol(lexical_scope, name, event);
lexical_scope->events[name] = event;
add_local_symbol(lexical_scope, name.first, event);
lexical_scope->events[name.first] = event;
}
void pform_make_events(const struct vlltype&loc, list<perm_string>*names)
void pform_make_events(const struct vlltype&loc, const list<pform_ident_t>*names)
{
list<perm_string>::iterator cur;
for (cur = names->begin() ; cur != names->end() ; ++ cur ) {
perm_string txt = *cur;
pform_make_event(loc, txt);
for (auto cur = names->begin() ; cur != names->end() ; ++ cur ) {
pform_make_event(loc, *cur);
}
delete names;
@ -2476,8 +2474,8 @@ void pform_make_pgassign_list(const struct vlltype&loc,
* This syntax is not part of the IEEE1364-1995 standard, but is
* approved by OVI as enhancement BTF-B14.
*/
void pform_make_var_init(const struct vlltype&li,
perm_string name, PExpr*expr)
void pform_make_var_init(const struct vlltype&li, const pform_ident_t&name,
PExpr*expr)
{
if (! pform_at_module_level() && !gn_system_verilog()) {
VLerror(li, "error: Variable declaration assignments are only "
@ -2486,7 +2484,7 @@ void pform_make_var_init(const struct vlltype&li,
return;
}
PEIdent*lval = new PEIdent(name, li.lexical_pos);
PEIdent*lval = new PEIdent(name.first, name.second);
FILE_NAME(lval, li);
PAssign*ass = new PAssign(lval, expr, !gn_system_verilog(), true);
FILE_NAME(ass, li);
@ -2514,8 +2512,10 @@ void pform_make_var_init(const struct vlltype&li,
*/
static PWire* pform_get_or_make_wire(const struct vlltype&li, perm_string name,
NetNet::Type type, NetNet::PortType ptype,
static PWire* pform_get_or_make_wire(const struct vlltype&li,
const pform_ident_t&name,
NetNet::Type type,
NetNet::PortType ptype,
PWSRType rt)
{
PWire *cur = 0;
@ -2523,7 +2523,7 @@ static PWire* pform_get_or_make_wire(const struct vlltype&li, perm_string name,
// If this is not a full declaration check if there is already a signal
// with the same name that can be extended.
if (rt != SR_BOTH)
cur = pform_get_wire_in_scope(name);
cur = pform_get_wire_in_scope(name.first);
// If the wire already exists but isn't yet fully defined,
// carry on adding details.
@ -2547,10 +2547,10 @@ static PWire* pform_get_or_make_wire(const struct vlltype&li, perm_string name,
// to the scope. Do not delete the old wire - it will
// remain in the local symbol map.
cur = new PWire(name, li.lexical_pos, type, ptype, rt);
cur = new PWire(name.first, name.second, type, ptype, rt);
FILE_NAME(cur, li);
pform_put_wire_in_scope(name, cur);
pform_put_wire_in_scope(name.first, cur);
return cur;
}
@ -2567,7 +2567,7 @@ static PWire* pform_get_or_make_wire(const struct vlltype&li, perm_string name,
* as is done for the old method.
*/
void pform_module_define_port(const struct vlltype&li,
perm_string name,
const pform_ident_t&name,
NetNet::PortType port_kind,
NetNet::Type type,
data_type_t*vtype,
@ -2621,11 +2621,10 @@ void pform_module_define_port(const struct vlltype&li,
* the variable/net. Other forms of pform_makewire ultimately call
* this one to create the wire and stash it.
*/
PWire *pform_makewire(const vlltype&li, perm_string name, NetNet::Type type,
std::list<pform_range_t> *indices)
PWire *pform_makewire(const vlltype&li, const pform_ident_t&name,
NetNet::Type type, std::list<pform_range_t> *indices)
{
PWire*cur = pform_get_or_make_wire(li, name, type, NetNet::NOT_A_PORT,
SR_NET);
PWire*cur = pform_get_or_make_wire(li, name, type, NetNet::NOT_A_PORT, SR_NET);
ivl_assert(li, cur);
if (indices && !indices->empty())
@ -2666,7 +2665,8 @@ void pform_makewire(const struct vlltype&li,
if (type == NetNet::REG || type == NetNet::IMPLICIT_REG) {
pform_make_var_init(li, first->name, expr);
} else {
PEIdent*lval = new PEIdent(first->name, li.lexical_pos);
PEIdent*lval = new PEIdent(first->name.first,
first->name.second);
FILE_NAME(lval, li);
PGAssign*ass = pform_make_pgassign(lval, expr, delay, str);
FILE_NAME(ass, li);
@ -2735,10 +2735,8 @@ vector<pform_tf_port_t>*pform_make_task_ports(const struct vlltype&loc,
for (list<pform_port_t>::iterator cur = ports->begin();
cur != ports->end(); ++cur) {
const perm_string &name = cur->name;
PWire*curw = pform_get_or_make_wire(loc, name, NetNet::IMPLICIT_REG,
pt, rt);
PWire*curw = pform_get_or_make_wire(loc, cur->name,
NetNet::IMPLICIT_REG, pt, rt);
if (rt == SR_BOTH)
curw->set_data_type(vtype);
@ -3170,8 +3168,7 @@ void pform_set_port_type(const struct vlltype&li,
; cur != ports->end() ; ++ cur ) {
PWire *wire = pform_get_or_make_wire(li, cur->name,
NetNet::IMPLICIT, pt,
SR_PORT);
NetNet::IMPLICIT, pt, SR_PORT);
pform_set_net_range(wire, vt, SR_PORT, attr);
if (cur->udims) {
@ -3235,15 +3232,14 @@ void pform_set_data_type(const struct vlltype&li, data_type_t*data_type,
delete wires;
}
vector<PWire*>* pform_make_udp_input_ports(list<perm_string>*names)
vector<PWire*>* pform_make_udp_input_ports(list<pform_ident_t>*names)
{
vector<PWire*>*out = new vector<PWire*>(names->size());
unsigned idx = 0;
for (list<perm_string>::iterator cur = names->begin()
for (list<pform_ident_t>::iterator cur = names->begin()
; cur != names->end() ; ++ cur ) {
perm_string txt = *cur;
PWire*pp = new PWire(txt, /* FIXME */ 0,
PWire*pp = new PWire(cur->first, cur->second,
NetNet::IMPLICIT,
NetNet::PINPUT);
(*out)[idx] = pp;

22
pform.h
View File

@ -151,7 +151,7 @@ extern void pform_set_scope_timescale(const struct vlltype&loc);
in an ansi style or non-ansi style declaration. In this case, we have
everything needed to define the port, all in one place. */
extern void pform_module_define_port(const struct vlltype&li,
perm_string name,
const pform_ident_t&name,
NetNet::PortType,
NetNet::Type type,
data_type_t*vtype,
@ -186,14 +186,14 @@ extern void pform_end_class_declaration(const struct vlltype&loc);
extern bool pform_in_class();
extern void pform_make_udp(const struct vlltype&loc, perm_string name,
std::list<perm_string>*parms,
std::list<pform_ident_t>*parms,
std::vector<PWire*>*decl, std::list<std::string>*table,
Statement*init);
extern void pform_make_udp(const struct vlltype&loc, perm_string name,
bool sync_flag, perm_string out_name,
bool sync_flag, const pform_ident_t&out_name,
PExpr*sync_init,
std::list<perm_string>*parms,
std::list<pform_ident_t>*parms,
std::list<std::string>*table);
/*
* Package related functions.
@ -272,7 +272,7 @@ extern verinum* pform_verinum_with_size(verinum*s, verinum*val,
* This function takes the list of names as new genvars to declare in
* the current module or generate scope.
*/
extern void pform_genvars(const struct vlltype&li, std::list<perm_string>*names);
extern void pform_genvars(const struct vlltype&li, std::list<pform_ident_t>*names);
/*
* This flag is set by the parser to indicate the current generate block
@ -338,7 +338,8 @@ extern PForeach* pform_make_foreach(const struct vlltype&loc,
* The makewire functions announce to the pform code new wires. These
* go into a module that is currently opened.
*/
extern PWire *pform_makewire(const struct vlltype&li, perm_string name,
extern PWire *pform_makewire(const struct vlltype&li,
const pform_ident_t&name,
NetNet::Type type,
std::list<pform_range_t> *indices);
@ -360,7 +361,8 @@ extern void pform_make_var(const struct vlltype&loc,
bool is_const = false);
extern void pform_make_var_init(const struct vlltype&li,
perm_string name, PExpr*expr);
const pform_ident_t&name,
PExpr*expr);
/* This function is used when we have an incomplete port definition in
a non-ansi style declaration. Look up the names of the wires, and set
@ -460,10 +462,10 @@ extern PProcess* pform_make_behavior(ivl_process_type_t, Statement*,
std::list<named_pexpr_t>*attr);
extern void pform_mc_translate_on(bool flag);
extern std::vector<PWire*>* pform_make_udp_input_ports(std::list<perm_string>*);
extern std::vector<PWire*>* pform_make_udp_input_ports(std::list<pform_ident_t>*);
extern void pform_make_events(const struct vlltype&loc,
std::list<perm_string>*names);
const std::list<pform_ident_t>*names);
/*
* The makegate function creates a new gate (which need not have a
* name) and connects it to the specified wires.
@ -537,7 +539,7 @@ extern void pform_discipline_potential(const struct vlltype&loc, const char*name
extern void pform_discipline_flow(const struct vlltype&loc, const char*name);
extern void pform_attach_discipline(const struct vlltype&loc,
ivl_discipline_t discipline, std::list<perm_string>*names);
ivl_discipline_t discipline, std::list<pform_ident_t>*names);
extern void pform_dump(std::ostream&out, const ivl_nature_s*);
extern void pform_dump(std::ostream&out, const ivl_discipline_s*);

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2021 Stephen Williams (steve@icarus.com)
* Copyright (c) 2008-2024 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -189,12 +189,12 @@ void pform_end_discipline(const struct vlltype&loc)
* in the current lexical scope.
*/
void pform_attach_discipline(const struct vlltype&loc,
ivl_discipline_t discipline, list<perm_string>*names)
ivl_discipline_t discipline, list<pform_ident_t>*names)
{
for (list<perm_string>::iterator cur = names->begin()
for (list<pform_ident_t>::iterator cur = names->begin()
; cur != names->end() ; ++ cur ) {
PWire* cur_net = pform_get_wire_in_scope(*cur);
PWire* cur_net = pform_get_wire_in_scope(cur->first);
if (cur_net == 0) {
/* Not declared yet, declare it now. */
cur_net = pform_makewire(loc, *cur, NetNet::WIRE, 0);

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@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2023 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2024 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -374,7 +374,7 @@ void struct_member_t::pform_dump(ostream&out, unsigned indent) const
for (list<decl_assignment_t*>::iterator cur = names->begin()
; cur != names->end() ; ++cur) {
decl_assignment_t*curp = *cur;
out << " " << curp->name;
out << " " << curp->name.first;
}
out << ";" << endl;
}

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@ -86,12 +86,12 @@ void pform_class_property(const struct vlltype&loc,
FILE_NAME(use_type, loc);
}
pform_cur_class->type->properties[curp->name]
pform_cur_class->type->properties[curp->name.first]
= class_type_t::prop_info_t(property_qual,use_type);
FILE_NAME(&pform_cur_class->type->properties[curp->name], loc);
FILE_NAME(&pform_cur_class->type->properties[curp->name.first], loc);
if (PExpr*rval = curp->expr.release()) {
PExpr*lval = new PEIdent(curp->name, loc.lexical_pos);
PExpr*lval = new PEIdent(curp->name.first, curp->name.second);
FILE_NAME(lval, loc);
PAssign*tmp = new PAssign(lval, rval);
FILE_NAME(tmp, loc);
@ -110,7 +110,7 @@ void pform_set_this_class(const struct vlltype&loc, PTaskFunc*net)
return;
list<pform_port_t>*this_name = new list<pform_port_t>;
this_name->push_back(pform_port_t(perm_string::literal(THIS_TOKEN), 0, 0));
this_name->push_back(pform_port_t({ perm_string::literal(THIS_TOKEN), 0 }, 0, 0));
vector<pform_tf_port_t>*this_port = pform_make_task_ports(loc,
NetNet::PINPUT,
pform_cur_class->type,

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@ -49,6 +49,12 @@ class netclass_t;
class netenum_t;
typedef named<PExpr*> named_pexpr_t;
/*
* The pform_ident_t holds the identifier name and its lexical position
* (the lexical_pos supplied by the scanner).
*/
typedef std::pair<perm_string, unsigned> pform_ident_t;
/*
* The pform_range_t holds variable dimensions for type
* declarations. The two expressions are interpreted as the first and
@ -89,11 +95,11 @@ struct lgate : public LineInfo {
* declarations.
*/
struct pform_port_t {
pform_port_t(perm_string n, std::list<pform_range_t>*ud, PExpr*e)
pform_port_t(pform_ident_t n, std::list<pform_range_t>*ud, PExpr*e)
: name(n), udims(ud), expr(e) { }
~pform_port_t() { }
perm_string name;
pform_ident_t name;
std::list<pform_range_t>*udims;
PExpr*expr;
};
@ -130,7 +136,7 @@ struct name_component_t {
};
struct decl_assignment_t {
perm_string name;
pform_ident_t name;
std::list<pform_range_t>index;
std::unique_ptr<PExpr> expr;
};