luke
/
iverilog
mirror of https://github.com/steveicarus/iverilog.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Handle error case of zero width in indexed part select. 

The compiler doesn't currently check that the width of an indexed
part select is non-zero. If code contains this erroneous case, the
compiler can crash (with an assertion failure). This patch causes
the compiler to output a suitable error message and recover. It
also fixes a potential crash if an illegal expresson is encountered.
(cherry picked from commit c4ff8300d3)
This commit is contained in:
Martin Whitaker 2012-07-26 18:08:18 +01:00 committed by Stephen Williams
parent d3563bc210
commit db3b1d9bf0
2 changed files with 10 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
elab_expr.cc
View File

@ -1932,15 +1932,18 @@ bool PEIdent::calculate_up_do_width_(Design*des, NetScope*scope,
need_constant_expr = false;
NetEConst*wid_c = dynamic_cast<NetEConst*>(wid_ex);
if (wid_c == 0) {
cerr << get_fileline() << ": error: Indexed part width must be "
<< "constant. Expression in question is..." << endl;
cerr << get_fileline() << ": : " << *wid_ex << endl;
wid = wid_c? wid_c->value().as_ulong() : 0;
if (wid == 0) {
cerr << index_tail.lsb->get_fileline() << ": error: "
"Indexed part widths must be constant and greater than zero."
<< endl;
cerr << index_tail.lsb->get_fileline() << ": : "
"This part width expression violates the rule: "
<< *index_tail.lsb << endl;
des->errors += 1;
flag = false;
wid = 1;
}
wid = wid_c? wid_c->value().as_ulong() : 1;
delete wid_ex;
return flag;

1
expr_synth.cc
View File

@ -1048,6 +1048,7 @@ NetNet* NetESelect::synthesize(Design *des, NetScope*scope, NetExpr*root)
NetPartSelect::VP);
des->add_node(sel);
ivl_assert(*this, select_width > 0);
NetNet*tmp = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, select_width);
tmp->data_type(sub->data_type());