Simulate carry output on adders.
This commit is contained in:
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98a57f4fac
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17
elab_net.cc
17
elab_net.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: elab_net.cc,v 1.11 1999/12/02 04:08:10 steve Exp $"
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#ident "$Id: elab_net.cc,v 1.12 1999/12/16 02:42:14 steve Exp $"
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#endif
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# include "PExpr.h"
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@ -236,8 +236,14 @@ NetNet* PEBinary::elaborate_net_add_(Design*des, const string&path,
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if (rsig->pin_count() > lsig->pin_count())
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width = rsig->pin_count();
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// If the desired output size if creater then the largest
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// operand, then include the carry of the adder as an output.
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unsigned owidth = width;
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if (lwidth > owidth)
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owidth = width + 1;
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// Make the adder as wide as the widest operand
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osig = new NetNet(0, des->local_symbol(path), NetNet::WIRE, width);
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osig = new NetNet(0, des->local_symbol(path), NetNet::WIRE, owidth);
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NetAddSub*adder = new NetAddSub(name, width);
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// Connect the adder to the various parts.
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@ -245,8 +251,10 @@ NetNet* PEBinary::elaborate_net_add_(Design*des, const string&path,
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connect(lsig->pin(idx), adder->pin_DataA(idx));
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for (unsigned idx = 0 ; idx < rsig->pin_count() ; idx += 1)
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connect(rsig->pin(idx), adder->pin_DataB(idx));
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for (unsigned idx = 0 ; idx < osig->pin_count() ; idx += 1)
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for (unsigned idx = 0 ; idx < width ; idx += 1)
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connect(osig->pin(idx), adder->pin_Result(idx));
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if (owidth > width)
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connect(osig->pin(width), adder->pin_Cout());
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gate = adder;
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des->add_signal(osig);
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@ -898,6 +906,9 @@ NetNet* PETernary::elaborate_net(Design*des, const string&path,
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/*
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* $Log: elab_net.cc,v $
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* Revision 1.12 1999/12/16 02:42:14 steve
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* Simulate carry output on adders.
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*
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* Revision 1.11 1999/12/02 04:08:10 steve
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* Elaborate net repeat concatenations.
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*
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15
netlist.cc
15
netlist.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: netlist.cc,v 1.99 1999/12/05 19:30:43 steve Exp $"
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#ident "$Id: netlist.cc,v 1.100 1999/12/16 02:42:15 steve Exp $"
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#endif
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# include <cassert>
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@ -642,6 +642,16 @@ unsigned NetAddSub::width()const
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return (pin_count() - 6) / 3;
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}
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NetObj::Link& NetAddSub::pin_Cout()
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{
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return pin(4);
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}
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const NetObj::Link& NetAddSub::pin_Cout() const
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{
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return pin(4);
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}
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NetObj::Link& NetAddSub::pin_DataA(unsigned idx)
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{
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idx = 6 + idx*3;
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@ -2734,6 +2744,9 @@ NetNet* Design::find_signal(bool (*func)(const NetNet*))
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/*
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* $Log: netlist.cc,v $
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* Revision 1.100 1999/12/16 02:42:15 steve
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* Simulate carry output on adders.
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*
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* Revision 1.99 1999/12/05 19:30:43 steve
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* Generate XNF RAMS from synthesized memories.
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*
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: netlist.h,v 1.101 1999/12/12 06:03:14 steve Exp $"
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#ident "$Id: netlist.h,v 1.102 1999/12/16 02:42:15 steve Exp $"
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#endif
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/*
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@ -321,6 +321,7 @@ class NetAddSub : public NetNode {
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NetObj::Link& pin_DataB(unsigned idx);
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NetObj::Link& pin_Result(unsigned idx);
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const NetObj::Link& pin_Cout() const;
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const NetObj::Link& pin_DataA(unsigned idx) const;
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const NetObj::Link& pin_DataB(unsigned idx) const;
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const NetObj::Link& pin_Result(unsigned idx) const;
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@ -2069,6 +2070,9 @@ extern ostream& operator << (ostream&, NetNet::Type);
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/*
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* $Log: netlist.h,v $
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* Revision 1.102 1999/12/16 02:42:15 steve
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* Simulate carry output on adders.
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*
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* Revision 1.101 1999/12/12 06:03:14 steve
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* Allow memories without indices in expressions.
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*
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19
t-vvm.cc
19
t-vvm.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: t-vvm.cc,v 1.90 1999/12/12 19:47:54 steve Exp $"
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#ident "$Id: t-vvm.cc,v 1.91 1999/12/16 02:42:15 steve Exp $"
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#endif
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# include <iostream>
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@ -911,6 +911,15 @@ void target_vvm::lpm_add_sub(ostream&os, const NetAddSub*gate)
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emit_gate_outputfun_(gate, pin);
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}
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// Connect the carry output if necessary.
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if (gate->pin_Cout().is_linked()) {
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unsigned pin = gate->pin_Cout().get_pin();
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string outfun = defn_gate_outputfun_(os, gate, pin);
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init_code << " " << mangle(gate->name()) <<
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".config_cout(&" << outfun << ");" << endl;
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emit_gate_outputfun_(gate, pin);
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}
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if (gate->attribute("LPM_Direction") == "ADD") {
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init_code << " " << mangle(gate->name()) <<
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".init_Add_Sub(0, V1);" << endl;
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@ -920,6 +929,8 @@ void target_vvm::lpm_add_sub(ostream&os, const NetAddSub*gate)
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".init_Add_Sub(0, V0);" << endl;
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}
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start_code << " " << mangle(gate->name()) << ".start();" << endl;
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}
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void target_vvm::lpm_clshift(ostream&os, const NetCLShift*gate)
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@ -1071,8 +1082,7 @@ void target_vvm::logic(ostream&os, const NetLogic*gate)
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emit_gate_outputfun_(gate, 0);
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start_code << " " << mangle(gate->name()) <<
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".start();" << endl;
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start_code << " " << mangle(gate->name()) << ".start();" << endl;
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}
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void target_vvm::bufz(ostream&os, const NetBUFZ*gate)
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@ -1955,6 +1965,9 @@ extern const struct target tgt_vvm = {
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};
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/*
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* $Log: t-vvm.cc,v $
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* Revision 1.91 1999/12/16 02:42:15 steve
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* Simulate carry output on adders.
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*
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* Revision 1.90 1999/12/12 19:47:54 steve
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* Remove the useless vvm_simulation class.
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*
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7
t-xnf.cc
7
t-xnf.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: t-xnf.cc,v 1.19 1999/12/05 19:30:43 steve Exp $"
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#ident "$Id: t-xnf.cc,v 1.20 1999/12/16 02:42:15 steve Exp $"
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#endif
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/* XNF BACKEND
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@ -465,7 +465,7 @@ void target_xnf::lpm_add_sub(ostream&os, const NetAddSub*gate)
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unsigned width = gate->width();
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// Don't handle carry output yet
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// assert (count_outputs(gate->pin_Cout())==0);
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assert (! gate->pin_Cout().is_linked());
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unsigned carry_width = width-1;
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/* Make the force-0 cary mode object to initialize the bottom
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@ -687,6 +687,9 @@ extern const struct target tgt_xnf = { "xnf", &target_xnf_obj };
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/*
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* $Log: t-xnf.cc,v $
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* Revision 1.20 1999/12/16 02:42:15 steve
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* Simulate carry output on adders.
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*
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* Revision 1.19 1999/12/05 19:30:43 steve
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* Generate XNF RAMS from synthesized memories.
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*
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: vvm_gates.h,v 1.32 1999/12/12 19:47:54 steve Exp $"
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#ident "$Id: vvm_gates.h,v 1.33 1999/12/16 02:42:15 steve Exp $"
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#endif
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# include "vvm.h"
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@ -81,10 +81,16 @@ class vvm_1bit_out {
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template <unsigned WIDTH> class vvm_add_sub {
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public:
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vvm_add_sub() : ndir_(V0) { }
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vvm_add_sub() : ndir_(V0), co_(0) { }
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void config_rout(unsigned idx, vvm_out_event::action_t a)
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{ o_[idx] = a;
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r_[idx] = Vx;
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}
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void config_cout(vvm_out_event::action_t a)
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{ co_ = a;
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c_ = Vx;
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}
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void init_DataA(unsigned idx, vpip_bit_t val)
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@ -99,6 +105,8 @@ template <unsigned WIDTH> class vvm_add_sub {
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{ ndir_ = not(val);
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}
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void start() { compute_(); }
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void set_DataA(unsigned idx, vpip_bit_t val)
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{ a_[idx] = val;
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compute_();
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@ -112,12 +120,14 @@ template <unsigned WIDTH> class vvm_add_sub {
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vpip_bit_t a_[WIDTH];
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vpip_bit_t b_[WIDTH];
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vpip_bit_t r_[WIDTH];
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vpip_bit_t c_;
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// this is the inverse of the Add_Sub port. It is 0 for add,
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// and 1 for subtract.
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vpip_bit_t ndir_;
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vvm_out_event::action_t o_[WIDTH];
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vvm_out_event::action_t co_;
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void compute_()
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{ vpip_bit_t carry = ndir_;
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@ -130,6 +140,8 @@ template <unsigned WIDTH> class vvm_add_sub {
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vvm_event*ev = new vvm_out_event(val, o_[idx]);
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ev->schedule();
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}
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if (co_ && (carry != c_))
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(new vvm_out_event(carry, co_)) -> schedule();
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}
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};
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@ -921,6 +933,9 @@ template <unsigned WIDTH> class vvm_pevent {
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/*
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* $Log: vvm_gates.h,v $
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* Revision 1.33 1999/12/16 02:42:15 steve
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* Simulate carry output on adders.
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*
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* Revision 1.32 1999/12/12 19:47:54 steve
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* Remove the useless vvm_simulation class.
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*
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